drm/amd/display: Fix 300Hz Freesync bug

Needed to reprogram vblank_start in dml properly in order to get the
correct dlg params to program VTG.

Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Reviewed-by: Martin Leung <Martin.Leung@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 3d89904..46f2b54 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -287,7 +287,6 @@ bool dc_stream_adjust_vmin_vmax(struct dc *dc,
                struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i];
 
                if (pipe->stream == stream && pipe->stream_res.tg) {
-                       pipe->stream->adjust = *adjust;
                        dc->hwss.set_drr(&pipe,
                                        1,
                                        adjust->v_total_min,

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
index 2dafa20..b715ecc 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
@@ -1883,12 +1883,14 @@ int dcn20_populate_dml_pipes_from_context(
        for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) {
                struct dc_crtc_timing *timing = &res_ctx->pipe_ctx[i].stream->timing;
                unsigned int v_total;
+               unsigned int front_porch;
                int output_bpc;
 
                if (!res_ctx->pipe_ctx[i].stream)
                        continue;
 
                v_total = timing->v_total;
+               front_porch = timing->v_front_porch;
                /* todo:
                pipes[pipe_cnt].pipe.src.dynamic_metadata_enable = 0;
                pipes[pipe_cnt].pipe.src.dcc = 0;
@@ -1915,7 +1917,7 @@ int dcn20_populate_dml_pipes_from_context(
                                - timing->h_addressable
                                - timing->h_border_left
                                - timing->h_border_right;
-               pipes[pipe_cnt].pipe.dest.vblank_start = v_total - timing->v_front_porch;
+               pipes[pipe_cnt].pipe.dest.vblank_start = v_total - front_porch;
                pipes[pipe_cnt].pipe.dest.vblank_end = pipes[pipe_cnt].pipe.dest.vblank_start
                                - timing->v_addressable
                                - timing->v_border_top

diff --git a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
index 832bc9b..6e5ecef 100644 (file)
--- a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
+++ b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
@@ -812,11 +812,12 @@ void mod_freesync_build_vrr_params(struct mod_freesync *mod_freesync,
                        2 * in_out_vrr->min_refresh_in_uhz)
                in_out_vrr->btr.btr_enabled = false;
 
-       in_out_vrr->fixed.fixed_active = false;
        in_out_vrr->btr.btr_active = false;
        in_out_vrr->btr.inserted_duration_in_us = 0;
        in_out_vrr->btr.frames_to_insert = 0;
        in_out_vrr->btr.frame_counter = 0;
+       in_out_vrr->fixed.fixed_active = false;
+       in_out_vrr->fixed.target_refresh_in_uhz = 0;
 
        in_out_vrr->btr.mid_point_in_us =
                                (in_out_vrr->min_duration_in_us +