arm64: dts: qcom: msm8996: Add DSI0 nodes

Add required nodes to support DSI displays connected to the
primary interface.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210228130831.203765-9-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 6ee5453..768fdfa 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -545,6 +545,11 @@
 
                                iommus = <&mdp_smmu 0>;
 
+                               assigned-clocks = <&mmcc MDSS_MDP_CLK>,
+                                        <&mmcc MDSS_VSYNC_CLK>;
+                               assigned-clock-rates = <300000000>,
+                                        <19200000>;
+
                                ports {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
@@ -555,9 +560,82 @@
                                                        remote-endpoint = <&hdmi_in>;
                                                };
                                        };
+
+                                       port@1 {
+                                               reg = <1>;
+                                               mdp5_intf1_out: endpoint {
+                                                       remote-endpoint = <&dsi0_in>;
+                                               };
+                                       };
                                };
                        };
 
+                       dsi0: dsi@994000 {
+                               compatible = "qcom,mdss-dsi-ctrl";
+                               reg = <0x00994000 0x400>;
+                               reg-names = "dsi_ctrl";
+
+                               interrupt-parent = <&mdss>;
+                               interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
+
+                               clocks = <&mmcc MDSS_MDP_CLK>,
+                                        <&mmcc MDSS_BYTE0_CLK>,
+                                        <&mmcc MDSS_AHB_CLK>,
+                                        <&mmcc MDSS_AXI_CLK>,
+                                        <&mmcc MMSS_MISC_AHB_CLK>,
+                                        <&mmcc MDSS_PCLK0_CLK>,
+                                        <&mmcc MDSS_ESC0_CLK>;
+                               clock-names = "mdp_core",
+                                             "byte",
+                                             "iface",
+                                             "bus",
+                                             "core_mmss",
+                                             "pixel",
+                                             "core";
+
+                               phys = <&dsi0_phy>;
+                               phy-names = "dsi";
+                               status = "disabled";
+
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               ports {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       port@0 {
+                                               reg = <0>;
+                                               dsi0_in: endpoint {
+                                                       remote-endpoint = <&mdp5_intf1_out>;
+                                               };
+                                       };
+
+                                       port@1 {
+                                               reg = <1>;
+                                               dsi0_out: endpoint {
+                                               };
+                                       };
+                               };
+                       };
+
+                       dsi0_phy: dsi-phy@994400 {
+                               compatible = "qcom,dsi-phy-14nm";
+                               reg = <0x00994400 0x100>,
+                                     <0x00994500 0x300>,
+                                     <0x00994800 0x188>;
+                               reg-names = "dsi_phy",
+                                           "dsi_phy_lane",
+                                           "dsi_pll";
+
+                               #clock-cells = <1>;
+                               #phy-cells = <0>;
+
+                               clocks = <&mmcc MDSS_AHB_CLK>, <&xo_board>;
+                               clock-names = "iface", "ref";
+                               status = "disabled";
+                       };
+
                        hdmi: hdmi-tx@9a0000 {
                                compatible = "qcom,hdmi-tx-8996";
                                reg =   <0x009a0000 0x50c>,