#define OCTEON_PCIBUS_DEBUG
#endif
+#ifdef OCTEON_PCIBUS_DEBUG
+#define DEBUG_PRINT(p) printf p
+#else
+#define DEBUG_PRINT(p)
+#endif
+
int octeon_pcibus_match(struct device *, void *, void *);
void octeon_pcibus_attach(struct device *, struct device *, void *);
int octeon_pcibus_intr_map(int dev, int fn, int pin);
octeon_pcibus_match(struct device *parent, void *vcf, void *aux)
{
struct mainbus_attach_args *maa = aux;
- printf("%s:%d:%s %s\n",__FUNCTION__,__LINE__,maa->maa_name, pcibus_cd.cd_name);
+ DEBUG_PRINT(("%s:%d:%s %s\n",__FUNCTION__,__LINE__,maa->maa_name, pcibus_cd.cd_name));
if (strcmp(maa->maa_name, pcibus_cd.cd_name) == 0)
return (1);
/*
* Setup interrupt handling.
*/
- printf("%s:%d:\n",__FUNCTION__,__LINE__);
+ DEBUG_PRINT(("%s:%d:\n",__FUNCTION__,__LINE__));
#if 0
REGVAL(OCTEON_PCIBUS_GPIOIE) = oc->oc_gpioIE;
{
struct intrhand **p, *q, *ih;
int s;
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
+ DEBUG_PRINT(("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__));
#ifdef DIAGNOSTIC
if (irq >= OCTEON_PCIBUS_NINTS || irq == OCTEON_PCIBUS_ISA_IRQ(2) || irq < 0)
int irq = ih->ih_irq;
int s;
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
+ DEBUG_PRINT(("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__));
#ifdef DIAGNOSTIC
if (irq >= OCTEON_PCIBUS_NINTS || irq == OCTEON_PCIBUS_ISA_IRQ(2) || irq < 0)
panic("octeon_pcibus_intr_disestablish: illegal irq %d", irq);
{
struct cpu_info *ci = curcpu();
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
+ DEBUG_PRINT(("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__));
/* Update masks to new ipl. Order highly important! */
__asm__ (".set noreorder\n");
ci->ci_ipl = newipl;
uint32_t clear, set;
uint32_t sr;
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
+ DEBUG_PRINT(("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__));
active = octeon_pcibus_intem & ~octeon_pcibus_imask[level];
/* be sure to mask high bits, there may be other interrupt sources */
clear = OCTEON_PCIBUS_DIRECT_MASK(octeon_pcibus_imask[level]);
sr = disableintr();
- printf("%s:%d:\n",__FUNCTION__,__LINE__);
+ DEBUG_PRINT(("%s:%d:\n",__FUNCTION__,__LINE__));
#if 0
if (clear != 0) {
REGVAL(OCTEON_PCIBUS_INTENCLR) = clear;
struct intrhand *q;
uint intrlevel[OCTEON_PCIBUS_NINTS];
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
+ DEBUG_PRINT(("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__));
/* First, figure out which levels each IRQ uses. */
for (irq = 0; irq < OCTEON_PCIBUS_NINTS; irq++) {
uint levels = 0;
uint32_t
octeon_pcibus_intr_2e(uint32_t hwpend, struct trap_frame *frame)
{
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
+ DEBUG_PRINT(("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__));
#if 0
uint64_t imr, isr, mask;
isr &= OCTEON_PCIBUS_INTRMASK_GPIN;
imr = REGVAL(OCTEON_PCIBUS_INTEN);
isr &= imr;
-#ifdef DEBUG
- printf("pci interrupt: imr %04x isr %04x\n", imr, isr);
-#endif
+
+ DEBUG_PRINT(("pci interrupt: imr %04x isr %04x\n", imr, isr));
+
if (isr == 0)
return 0; /* not for us */
uint32_t
octeon_pcibus_intr_2f(uint32_t hwpend, struct trap_frame *frame)
{
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
+ DEBUG_PRINT(("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__));
#if 0
uint64_t imr, isr, mask;
isr = REGVAL(OCTEON_PCIBUS_INTISR) & LOONGSON_INTRMASK_LVL4;
imr = REGVAL(OCTEON_PCIBUS_INTEN);
isr &= imr;
-#ifdef DEBUG
- printf("pci interrupt: imr %04x isr %04x\n", imr, isr);
-#endif
+
+ DEBUG_PRINT(("pci interrupt: imr %04x isr %04x\n", imr, isr));
+
if (isr == 0)
return 0; /* not for us */
void
octeon_pcibus_intr_dispatch(uint64_t isr, int startbit, struct trap_frame *frame)
{
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
+ DEBUG_PRINT(("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__));
#if 0
int lvl, bitno;
uint64_t tmpisr, mask;
}
if (rc == 0) {
printf("spurious interrupt %d\n", bitno);
-#ifdef DEBUG
- printf("ISR %08x IMR %08x ipl %d mask %08x\n",
+
+ DEBUG_PRINT(("ISR %08x IMR %08x ipl %d mask %08x\n",
REGVAL(OCTEON_PCIBUS_INTISR), REGVAL(OCTEON_PCIBUS_INTEN),
- frame->ipl, octeon_pcibus_imask[frame->ipl]);
+ frame->ipl, octeon_pcibus_imask[frame->ipl]));
#ifdef DDB
Debugger();
#endif
-#endif
+
}
if ((isr ^= mask) == 0)
octeon_pcibus_attach_hook(struct device *parent, struct device *self,
struct pcibus_attach_args *pba)
{
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
+ DEBUG_PRINT(("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__));
#if 0
pci_chipset_tag_t pc = pba->pba_pc;
struct octeon_pcibus_softc *sc = pc->pc_conf_v;
int
octeon_pcibus_bus_maxdevs(void *v, int busno)
{
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
+ DEBUG_PRINT(("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__));
return 32;
#if 0
struct octeon_pcibus_softc *sc = v;
struct octeon_pcibus_softc *sc = pc->pc_conf_v;
struct octeon_pcibus_cfg_hook *och;
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
+ DEBUG_PRINT(("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__));
och = malloc(sizeof *och, M_DEVBUF, M_NOWAIT);
if (och == NULL)
return ENOMEM;
const struct octeon_pcibus_config *oc = sc->sc_octeon_pcibus;
int bus, dev, fn, pin;
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
- printf("pa->pa_domain_ %d\n",pa->pa_domain);
- printf("pa->pa_bus %d\n",pa->pa_bus);
- printf("pa->pa_device %d\n",pa->pa_device);
- printf("pa->pa_function %d\n",pa->pa_function);
- printf("pa->pa_id %d\n",pa->pa_id);
- printf("pa->pa_class %d\n",pa->pa_class);
+ DEBUG_PRINT(("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__));
+ DEBUG_PRINT(("pa->pa_domain_ %d\n",pa->pa_domain));
+ DEBUG_PRINT(("pa->pa_bus %d\n",pa->pa_bus));
+ DEBUG_PRINT(("pa->pa_device %d\n",pa->pa_device));
+ DEBUG_PRINT(("pa->pa_function %d\n",pa->pa_function));
+ DEBUG_PRINT(("pa->pa_id %d\n",pa->pa_id));
+ DEBUG_PRINT(("pa->pa_class %d\n",pa->pa_class));
*ihp = (pci_intr_handle_t)-1;
if (pa->pa_intrpin == 0) /* no interrupt needed */
return 1;
- printf("%s: interrupt pin %d\n", __func__, pa->pa_intrpin);
+ DEBUG_PRINT(("%s: interrupt pin %d\n", __func__, pa->pa_intrpin));
#ifdef DIAGNOSTIC
if (pa->pa_intrpin > 4) {
}
#endif
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
+ DEBUG_PRINT(("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__));
pci_decompose_tag(pa->pa_pc, pa->pa_tag, &bus, &dev, &fn);
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
+ DEBUG_PRINT(("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__));
if (pa->pa_bridgetag) {
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
+ DEBUG_PRINT(("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__));
pin = PPB_INTERRUPT_SWIZZLE(pa->pa_rawintrpin, dev);
*ihp = pa->pa_bridgeih[pin - 1];
} else {
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
- printf("oc_intr_map %p\n",oc->oc_intr_map);
+ DEBUG_PRINT(("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__));
+ DEBUG_PRINT(("oc_intr_map %p\n",oc->oc_intr_map));
if (bus == 0)
*ihp = (*oc->oc_intr_map)(dev, fn, pa->pa_intrpin);
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
if (*ihp == (pci_intr_handle_t)-1)
return 1;
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
}
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
return 0;
}
octeon_pcibus_pci_intr_string(void *cookie, pci_intr_handle_t ih)
{
static char irqstr[1 + 12];
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
+ DEBUG_PRINT(("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__));
if (OCTEON_PCIBUS_IRQ_IS_ISA(ih))
snprintf(irqstr, sizeof irqstr, "isa irq %d",
octeon_pcibus_pci_intr_establish(void *cookie, pci_intr_handle_t ih, int level,
int (*cb)(void *), void *cbarg, char *name)
{
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
+ DEBUG_PRINT(("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__));
return octeon_pcibus_intr_establish(ih, IST_LEVEL, level, cb, cbarg, name);
}
void
octeon_pcibus_pci_intr_disestablish(void *cookie, void *ihp)
{
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
+ DEBUG_PRINT(("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__));
octeon_pcibus_intr_disestablish(ihp);
}
octeon_pcibus_io_map(bus_space_tag_t t, bus_addr_t offs, bus_size_t size, int flags,
bus_space_handle_t *bshp)
{
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
- printf("t->bus_base %p\n",t->bus_base);
- printf("offs %p\n",offs);
- printf("size %d\n",size);
- printf("flags %x\n",flags);
+ DEBUG_PRINT(("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__));
+ DEBUG_PRINT(("t->bus_base %p\n",t->bus_base));
+ DEBUG_PRINT(("offs %p\n",offs));
+ DEBUG_PRINT(("size %d\n",size));
+ DEBUG_PRINT(("flags %x\n",flags));
+
#if 0
const struct legacy_io_range *r;
if (offs < OCTEON_PCIBUS_PCIIO_LEGACY) {
return ENXIO;
}
#endif
- *bshp = t->bus_base + offs;
+ uint64_t endianSwap=0x400000000;
+ *bshp = (t->bus_base|endianSwap) + offs;
return 0;
}
octeon_pcibus_mem_map(bus_space_tag_t t, bus_addr_t offs, bus_size_t size, int flags,
bus_space_handle_t *bshp)
{
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
+ DEBUG_PRINT(("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__));
#if 0
uint32_t pcimap;
bus_addr_t pcilo_w[3];
* possible.
*/
- printf("%s:%d:\n",__FUNCTION__,__LINE__);
+ DEBUG_PRINT(("%s:%d:\n",__FUNCTION__,__LINE__));
#if 0
pcimap = REGVAL(OCTEON_PCIBUS_PCIMAP);
pcilo_w[0] = (pcimap & OCTEON_PCIBUS_PCIMAP_PCIMAP_LO0) >>
// uint32_t reg;
int errors;
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
+ DEBUG_PRINT(("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__));
exnamesz = 1 + 16 + 4;
exname = (char *)malloc(exnamesz, M_DEVBUF, M_NOWAIT);
if (exname == NULL)
errors++;
*/
} else {
- printf("%s:%d:\n",__FUNCTION__,__LINE__);
+ DEBUG_PRINT(("%s:%d:\n",__FUNCTION__,__LINE__));
#if 0
reg = REGVAL(OCTEON_PCIBUS_PCIMAP);
if (extent_free(ex,
void
octeon_pcibus_pci_attach_hook(pci_chipset_tag_t pc)
{
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
+ DEBUG_PRINT(("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__));
#if 0
pcireg_t id;
int
octeon_pcibus_intr_map(int dev, int fn, int pin)
{
- printf("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__);
- printf("Dev %x fn %x pin %x\n",dev,fn,pin);
+ DEBUG_PRINT(("%s:%s:%d:\n",__FILE__,__FUNCTION__,__LINE__));
+ DEBUG_PRINT(("Dev %x fn %x pin %x\n",dev,fn,pin));
#if 0
if (dev == generic2e_via686sb_dev) {
switch (fn) {