[TruncInstCombine] Remove scalable vector restriction

Differential Revision: https://reviews.llvm.org/D92819

diff --git a/llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp b/llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp
index e941817..0bcebc1 100644 (file)
--- a/llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp
+++ b/llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp
@@ -289,11 +289,8 @@ Type *TruncInstCombine::getBestTruncatedType() {
 /// version of \p Ty, otherwise return \p Ty.
 static Type *getReducedType(Value *V, Type *Ty) {
   assert(Ty && !Ty->isVectorTy() && "Expect Scalar Type");
-  if (auto *VTy = dyn_cast<VectorType>(V->getType())) {
-    // FIXME: should this handle scalable vectors?
-    return FixedVectorType::get(Ty,
-                                cast<FixedVectorType>(VTy)->getNumElements());
-  }
+  if (auto *VTy = dyn_cast<VectorType>(V->getType()))
+    return VectorType::get(Ty, VTy->getElementCount());
   return Ty;
 }
 

diff --git a/llvm/test/Transforms/AggressiveInstCombine/trunc_const_expr.ll b/llvm/test/Transforms/AggressiveInstCombine/trunc_const_expr.ll
index b83fcb4..32f3236 100644 (file)
--- a/llvm/test/Transforms/AggressiveInstCombine/trunc_const_expr.ll
+++ b/llvm/test/Transforms/AggressiveInstCombine/trunc_const_expr.ll
@@ -8,6 +8,7 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
 
 declare i32 @use32(i32)
 declare <2 x i32> @use32_vec(<2 x i32>)
+declare <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32>)
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;; These tests check cases where expression dag post-dominated by TruncInst
@@ -108,3 +109,35 @@ define void @const_expression_trunc_vec() {
   call <2 x i32> @use32_vec(<2 x i32> %T)
   ret void
 }
+
+define void @const_expression_mul_scale_vec() {
+; CHECK-LABEL: @const_expression_mul_scale_vec(
+; CHECK-NEXT:    [[TMP1:%.*]] = call <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32> zeroinitializer)
+; CHECK-NEXT:    ret void
+;
+  %A = mul <vscale x 2 x i64> zeroinitializer, zeroinitializer
+  %T = trunc <vscale x 2 x i64> %A to <vscale x 2 x i32>
+  call <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32> %T)
+  ret void
+}
+
+define void @const_expression_zext_scale_vec() {
+; CHECK-LABEL: @const_expression_zext_scale_vec(
+; CHECK-NEXT:    [[TMP1:%.*]] = call <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32> zeroinitializer)
+; CHECK-NEXT:    ret void
+;
+  %A = zext <vscale x 2 x i32> zeroinitializer to <vscale x 2 x i64>
+  %T = trunc <vscale x 2 x i64> %A to <vscale x 2 x i32>
+  call <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32> %T)
+  ret void
+}
+
+define void @const_expression_trunc_scale_vec() {
+; CHECK-LABEL: @const_expression_trunc_scale_vec(
+; CHECK-NEXT:    [[TMP1:%.*]] = call <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32> zeroinitializer)
+; CHECK-NEXT:    ret void
+;
+  %T = trunc <vscale x 2 x i64> zeroinitializer to <vscale x 2 x i32>
+  call <vscale x 2 x i32> @use32_scale_vec(<vscale x 2 x i32> %T)
+  ret void
+}