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Merge tag 'soc-fixes-5.17-4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
authorLinus Torvalds <torvalds@linux-foundation.org>
Sat, 19 Mar 2022 23:36:32 +0000 (16:36 -0700)
committerLinus Torvalds <torvalds@linux-foundation.org>
Sat, 19 Mar 2022 23:36:32 +0000 (16:36 -0700)
Pull ARM SoC fix from Arnd Bergmann:
 "Here is one last regression fix for 5.17, reverting a patch that went
  into 5.16 as a cleanup that ended up breaking external interrupts on
  Layerscape chips.

  The revert makes it work again, but also reintroduces a build time
  warning about the nonstandard DT binding that will have to be dealt
  with in the future"

* tag 'soc-fixes-5.17-4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  Revert "arm64: dts: freescale: Fix 'interrupt-map' parent address cells"

arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi

index 3ed1f2c..18e5291 100644 (file)
                                interrupt-controller;
                                reg = <0x14 4>;
                                interrupt-map =
-                                       <0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
-                                       <1 0 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
-                                       <2 0 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
-                                       <3 0 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
-                                       <4 0 &gic 0 0 GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
-                                       <5 0 &gic 0 0 GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
-                                       <6 0 &gic 0 0 GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
-                                       <7 0 &gic 0 0 GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
-                                       <8 0 &gic 0 0 GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
-                                       <9 0 &gic 0 0 GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
-                                       <10 0 &gic 0 0 GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
-                                       <11 0 &gic 0 0 GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+                                       <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                                       <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+                                       <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+                                       <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+                                       <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+                                       <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+                                       <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+                                       <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+                                       <8 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+                                       <9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+                                       <10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+                                       <11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
                                interrupt-map-mask = <0xffffffff 0x0>;
                        };
                };
index 3cb9c21..1282b61 100644 (file)
                                interrupt-controller;
                                reg = <0x14 4>;
                                interrupt-map =
-                                       <0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
-                                       <1 0 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
-                                       <2 0 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
-                                       <3 0 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
-                                       <4 0 &gic 0 0 GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
-                                       <5 0 &gic 0 0 GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
-                                       <6 0 &gic 0 0 GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
-                                       <7 0 &gic 0 0 GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
-                                       <8 0 &gic 0 0 GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
-                                       <9 0 &gic 0 0 GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
-                                       <10 0 &gic 0 0 GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
-                                       <11 0 &gic 0 0 GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+                                       <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                                       <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+                                       <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+                                       <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+                                       <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+                                       <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+                                       <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+                                       <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+                                       <8 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+                                       <9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+                                       <10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+                                       <11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
                                interrupt-map-mask = <0xffffffff 0x0>;
                        };
                };
index 7032505..3c611cb 100644 (file)
                                interrupt-controller;
                                reg = <0x14 4>;
                                interrupt-map =
-                                       <0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
-                                       <1 0 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
-                                       <2 0 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
-                                       <3 0 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
-                                       <4 0 &gic 0 0 GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
-                                       <5 0 &gic 0 0 GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
-                                       <6 0 &gic 0 0 GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
-                                       <7 0 &gic 0 0 GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
-                                       <8 0 &gic 0 0 GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
-                                       <9 0 &gic 0 0 GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
-                                       <10 0 &gic 0 0 GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
-                                       <11 0 &gic 0 0 GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+                                       <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                                       <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+                                       <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+                                       <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+                                       <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+                                       <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+                                       <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+                                       <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+                                       <8 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+                                       <9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+                                       <10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+                                       <11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
                                interrupt-map-mask = <0xffffffff 0x0>;
                        };
                };