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ARM: dts: sun8i-r40: add opp table for cpu
authorqianfan Zhao <qianfanguijin@163.com>
Tue, 17 May 2022 01:36:06 +0000 (09:36 +0800)
committerJernej Skrabec <jernej.skrabec@gmail.com>
Tue, 5 Jul 2022 19:40:13 +0000 (21:40 +0200)
OPP table value is get from allwinner lichee linux-3.10 kernel driver

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Tested-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220517013607.2252-3-qianfanguijin@163.com
arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
arch/arm/boot/dts/sun8i-r40-cpu-opp.dtsi [new file with mode: 0644]
arch/arm/boot/dts/sun8i-r40-feta40i.dtsi
arch/arm/boot/dts/sun8i-r40.dtsi
arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts
arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts

index 4f30018..28197bb 100644 (file)
@@ -43,6 +43,7 @@
 
 /dts-v1/;
 #include "sun8i-r40.dtsi"
+#include "sun8i-r40-cpu-opp.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 
diff --git a/arch/arm/boot/dts/sun8i-r40-cpu-opp.dtsi b/arch/arm/boot/dts/sun8i-r40-cpu-opp.dtsi
new file mode 100644 (file)
index 0000000..649928b
--- /dev/null
@@ -0,0 +1,52 @@
+/{
+       cpu0_opp_table: opp-table-cpu {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp-720000000 {
+                       opp-hz = /bits/ 64 <720000000>;
+                       opp-microvolt = <1000000 1000000 1300000>;
+                       clock-latency-ns = <2000000>;
+               };
+
+               opp-912000000 {
+                       opp-hz = /bits/ 64 <912000000>;
+                       opp-microvolt = <1100000 1100000 1300000>;
+                       clock-latency-ns = <2000000>;
+               };
+
+               opp-1008000000 {
+                       opp-hz = /bits/ 64 <1008000000>;
+                       opp-microvolt = <1160000 1160000 1300000>;
+                       clock-latency-ns = <2000000>;
+               };
+
+               opp-1104000000 {
+                       opp-hz = /bits/ 64 <1104000000>;
+                       opp-microvolt = <1240000 1240000 1300000>;
+                       clock-latency-ns = <2000000>;
+               };
+
+               opp-1200000000 {
+                       opp-hz = /bits/ 64 <1200000000>;
+                       opp-microvolt = <1300000 1300000 1300000>;
+                       clock-latency-ns = <2000000>;
+               };
+       };
+};
+
+&cpu0 {
+       operating-points-v2 = <&cpu0_opp_table>;
+};
+
+&cpu1 {
+       operating-points-v2 = <&cpu0_opp_table>;
+};
+
+&cpu2 {
+       operating-points-v2 = <&cpu0_opp_table>;
+};
+
+&cpu3 {
+       operating-points-v2 = <&cpu0_opp_table>;
+};
index b872b51..9f39b5a 100644 (file)
@@ -5,6 +5,7 @@
 //  Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
 
 #include "sun8i-r40.dtsi"
+#include "sun8i-r40-cpu-opp.dtsi"
 
 &cpu0 {
        cpu-supply = <&reg_dcdc2>;
index 75d55a4..88baaf6 100644 (file)
                        compatible = "arm,cortex-a7";
                        device_type = "cpu";
                        reg = <0>;
+                       clocks = <&ccu CLK_CPU>;
+                       clock-names = "cpu";
                };
 
                cpu1: cpu@1 {
                        compatible = "arm,cortex-a7";
                        device_type = "cpu";
                        reg = <1>;
+                       clocks = <&ccu CLK_CPU>;
+                       clock-names = "cpu";
                };
 
                cpu2: cpu@2 {
                        compatible = "arm,cortex-a7";
                        device_type = "cpu";
                        reg = <2>;
+                       clocks = <&ccu CLK_CPU>;
+                       clock-names = "cpu";
                };
 
                cpu3: cpu@3 {
                        compatible = "arm,cortex-a7";
                        device_type = "cpu";
                        reg = <3>;
+                       clocks = <&ccu CLK_CPU>;
+                       clock-names = "cpu";
                };
        };
 
index 0eb1990..9f47252 100644 (file)
@@ -45,6 +45,7 @@
 
 /dts-v1/;
 #include "sun8i-r40.dtsi"
+#include "sun8i-r40-cpu-opp.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 
index fdf8bd1..4348710 100644 (file)
@@ -42,6 +42,7 @@
 
 /dts-v1/;
 #include "sun8i-r40.dtsi"
+#include "sun8i-r40-cpu-opp.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>