ret <32 x i8> %4
}
-; FIXME: Prefer 'movd' over 'pinsr' to element 0.
-
define <4 x i32> @PR41512(i32 %x, i32 %y) {
-; SSE2-LABEL: PR41512:
-; SSE2: # %bb.0:
-; SSE2-NEXT: movd %edi, %xmm0
-; SSE2-NEXT: movd %esi, %xmm1
-; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
-; SSE2-NEXT: retq
-;
-; SSE3-LABEL: PR41512:
-; SSE3: # %bb.0:
-; SSE3-NEXT: movd %edi, %xmm0
-; SSE3-NEXT: movd %esi, %xmm1
-; SSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
-; SSE3-NEXT: retq
-;
-; SSSE3-LABEL: PR41512:
-; SSSE3: # %bb.0:
-; SSSE3-NEXT: movd %edi, %xmm0
-; SSSE3-NEXT: movd %esi, %xmm1
-; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
-; SSSE3-NEXT: retq
-;
-; SSE41-LABEL: PR41512:
-; SSE41: # %bb.0:
-; SSE41-NEXT: pxor %xmm1, %xmm1
-; SSE41-NEXT: pxor %xmm0, %xmm0
-; SSE41-NEXT: pinsrd $0, %edi, %xmm0
-; SSE41-NEXT: pinsrd $0, %esi, %xmm1
-; SSE41-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
-; SSE41-NEXT: retq
+; SSE-LABEL: PR41512:
+; SSE: # %bb.0:
+; SSE-NEXT: movd %edi, %xmm0
+; SSE-NEXT: movd %esi, %xmm1
+; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; SSE-NEXT: retq
;
; AVX-LABEL: PR41512:
; AVX: # %bb.0:
-; AVX-NEXT: vpxor %xmm0, %xmm0, %xmm0
-; AVX-NEXT: vpinsrd $0, %edi, %xmm0, %xmm1
-; AVX-NEXT: vpinsrd $0, %esi, %xmm0, %xmm0
-; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
+; AVX-NEXT: vmovd %edi, %xmm0
+; AVX-NEXT: vmovd %esi, %xmm1
+; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; AVX-NEXT: retq
%ins1 = insertelement <4 x i32> <i32 undef, i32 0, i32 undef, i32 undef>, i32 %x, i32 0
%ins2 = insertelement <4 x i32> <i32 undef, i32 0, i32 undef, i32 undef>, i32 %y, i32 0
}
define <4 x i64> @PR41512_v4i64(i64 %x, i64 %y) {
-; SSE2-LABEL: PR41512_v4i64:
-; SSE2: # %bb.0:
-; SSE2-NEXT: movq %rdi, %xmm0
-; SSE2-NEXT: movq %rsi, %xmm1
-; SSE2-NEXT: retq
-;
-; SSE3-LABEL: PR41512_v4i64:
-; SSE3: # %bb.0:
-; SSE3-NEXT: movq %rdi, %xmm0
-; SSE3-NEXT: movq %rsi, %xmm1
-; SSE3-NEXT: retq
-;
-; SSSE3-LABEL: PR41512_v4i64:
-; SSSE3: # %bb.0:
-; SSSE3-NEXT: movq %rdi, %xmm0
-; SSSE3-NEXT: movq %rsi, %xmm1
-; SSSE3-NEXT: retq
-;
-; SSE41-LABEL: PR41512_v4i64:
-; SSE41: # %bb.0:
-; SSE41-NEXT: pxor %xmm1, %xmm1
-; SSE41-NEXT: pxor %xmm0, %xmm0
-; SSE41-NEXT: pinsrq $0, %rdi, %xmm0
-; SSE41-NEXT: pinsrq $0, %rsi, %xmm1
-; SSE41-NEXT: retq
+; SSE-LABEL: PR41512_v4i64:
+; SSE: # %bb.0:
+; SSE-NEXT: movq %rdi, %xmm0
+; SSE-NEXT: movq %rsi, %xmm1
+; SSE-NEXT: retq
;
; AVX1-LABEL: PR41512_v4i64:
; AVX1: # %bb.0:
-; AVX1-NEXT: vpxor %xmm0, %xmm0, %xmm0
-; AVX1-NEXT: vpinsrq $0, %rdi, %xmm0, %xmm1
-; AVX1-NEXT: vpinsrq $0, %rsi, %xmm0, %xmm0
-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; AVX1-NEXT: vmovq %rdi, %xmm0
+; AVX1-NEXT: vmovq %rsi, %xmm1
+; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX1-NEXT: retq
;
; AVX2-LABEL: PR41512_v4i64:
; AVX2: # %bb.0:
-; AVX2-NEXT: vpxor %xmm0, %xmm0, %xmm0
-; AVX2-NEXT: vpinsrq $0, %rdi, %xmm0, %xmm1
-; AVX2-NEXT: vpinsrq $0, %rsi, %xmm0, %xmm0
-; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
+; AVX2-NEXT: vmovq %rdi, %xmm0
+; AVX2-NEXT: vmovq %rsi, %xmm1
+; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX2-NEXT: retq
%ins1 = insertelement <4 x i64> <i64 undef, i64 0, i64 undef, i64 undef>, i64 %x, i32 0
%ins2 = insertelement <4 x i64> <i64 undef, i64 0, i64 undef, i64 undef>, i64 %y, i32 0
}
define <4 x i32> @PR41512_loads(i32* %p1, i32* %p2) {
-; SSE2-LABEL: PR41512_loads:
-; SSE2: # %bb.0:
-; SSE2-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
-; SSE2-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
-; SSE2-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
-; SSE2-NEXT: retq
-;
-; SSE3-LABEL: PR41512_loads:
-; SSE3: # %bb.0:
-; SSE3-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
-; SSE3-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
-; SSE3-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
-; SSE3-NEXT: retq
-;
-; SSSE3-LABEL: PR41512_loads:
-; SSSE3: # %bb.0:
-; SSSE3-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
-; SSSE3-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
-; SSSE3-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
-; SSSE3-NEXT: retq
-;
-; SSE41-LABEL: PR41512_loads:
-; SSE41: # %bb.0:
-; SSE41-NEXT: pxor %xmm1, %xmm1
-; SSE41-NEXT: pxor %xmm0, %xmm0
-; SSE41-NEXT: pinsrd $0, (%rdi), %xmm0
-; SSE41-NEXT: pinsrd $0, (%rsi), %xmm1
-; SSE41-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
-; SSE41-NEXT: retq
+; SSE-LABEL: PR41512_loads:
+; SSE: # %bb.0:
+; SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; SSE-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; SSE-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; SSE-NEXT: retq
;
; AVX-LABEL: PR41512_loads:
; AVX: # %bb.0:
-; AVX-NEXT: vpxor %xmm0, %xmm0, %xmm0
-; AVX-NEXT: vpinsrd $0, (%rdi), %xmm0, %xmm1
-; AVX-NEXT: vpinsrd $0, (%rsi), %xmm0, %xmm0
-; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
+; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; AVX-NEXT: retq
%x = load i32, i32* %p1
%y = load i32, i32* %p2