phy: qcom-qmp: Add SM8450 UFS QMP Phy

SM8450 UFS seems to use same sequence as SM8350, so reuse the sequence
from SM8450. Add the new clock list for this phy and the new compatible

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Co-developed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Martin K. Petersen <martin.petersen@oracle.com>
Link: https://lore.kernel.org/r/20211201074456.3969849-4-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
index 456a59d..a959c97 100644 (file)
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -3091,6 +3091,10 @@ static const char * const qmp_v4_sm8250_usbphy_clk_l[] = {
        "aux", "ref_clk_src", "com_aux"
 };
 
+static const char * const sm8450_ufs_phy_clk_l[] = {
+       "qref", "ref", "ref_aux",
+};
+
 static const char * const sdm845_ufs_phy_clk_l[] = {
        "ref", "ref_aux",
 };
@@ -4087,6 +4091,31 @@ static const struct qmp_phy_cfg sm8350_usb3_uniphy_cfg = {
        .pwrdn_delay_max        = POWER_DOWN_DELAY_US_MAX,
 };
 
+static const struct qmp_phy_cfg sm8450_ufsphy_cfg = {
+       .type                   = PHY_TYPE_UFS,
+       .nlanes                 = 2,
+
+       .serdes_tbl             = sm8350_ufsphy_serdes_tbl,
+       .serdes_tbl_num         = ARRAY_SIZE(sm8350_ufsphy_serdes_tbl),
+       .tx_tbl                 = sm8350_ufsphy_tx_tbl,
+       .tx_tbl_num             = ARRAY_SIZE(sm8350_ufsphy_tx_tbl),
+       .rx_tbl                 = sm8350_ufsphy_rx_tbl,
+       .rx_tbl_num             = ARRAY_SIZE(sm8350_ufsphy_rx_tbl),
+       .pcs_tbl                = sm8350_ufsphy_pcs_tbl,
+       .pcs_tbl_num            = ARRAY_SIZE(sm8350_ufsphy_pcs_tbl),
+       .clk_list               = sm8450_ufs_phy_clk_l,
+       .num_clks               = ARRAY_SIZE(sm8450_ufs_phy_clk_l),
+       .vreg_list              = qmp_phy_vreg_l,
+       .num_vregs              = ARRAY_SIZE(qmp_phy_vreg_l),
+       .regs                   = sm8150_ufsphy_regs_layout,
+
+       .start_ctrl             = SERDES_START,
+       .pwrdn_ctrl             = SW_PWRDN,
+       .phy_status             = PHYSTATUS,
+
+       .is_dual_lane_phy       = true,
+};
+
 static const struct qmp_phy_cfg qcm2290_usb3phy_cfg = {
        .type                   = PHY_TYPE_USB3,
        .nlanes                 = 1,
@@ -5746,6 +5775,9 @@ static const struct of_device_id qcom_qmp_phy_of_match_table[] = {
                .compatible = "qcom,sm8350-qmp-usb3-uni-phy",
                .data = &sm8350_usb3_uniphy_cfg,
        }, {
+               .compatible = "qcom,sm8450-qmp-ufs-phy",
+               .data = &sm8450_ufsphy_cfg,
+       }, {
                .compatible = "qcom,qcm2290-qmp-usb3-phy",
                .data = &qcm2290_usb3phy_cfg,
        },