drm/amdgpu: query default sclk from smu for cyan_skillfish

Query default sclk instead of hard code.

Signed-off-by: Lang Yu <lang.yu@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
index 3d4c65b..cbc3f99 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
@@ -47,7 +47,6 @@
 /* unit: MHz */
 #define CYAN_SKILLFISH_SCLK_MIN                        1000
 #define CYAN_SKILLFISH_SCLK_MAX                        2000
-#define CYAN_SKILLFISH_SCLK_DEFAULT                    1800
 
 /* unit: mV */
 #define CYAN_SKILLFISH_VDDC_MIN                        700
@@ -59,6 +58,8 @@ static struct gfx_user_settings {
        uint32_t vddc;
 } cyan_skillfish_user_settings;
 
+static uint32_t cyan_skillfish_sclk_default;
+
 #define FEATURE_MASK(feature) (1ULL << feature)
 #define SMC_DPM_FEATURE ( \
        FEATURE_MASK(FEATURE_FCLK_DPM_BIT)      |       \
@@ -365,13 +366,19 @@ static bool cyan_skillfish_is_dpm_running(struct smu_context *smu)
                return false;
 
        ret = smu_cmn_get_enabled_32_bits_mask(smu, feature_mask, 2);
-
        if (ret)
                return false;
 
        feature_enabled = (uint64_t)feature_mask[0] |
                                ((uint64_t)feature_mask[1] << 32);
 
+       /*
+        * cyan_skillfish specific, query default sclk inseted of hard code.
+        */
+       if (!cyan_skillfish_sclk_default)
+               cyan_skillfish_get_smu_metrics_data(smu, METRICS_CURR_GFXCLK,
+                       &cyan_skillfish_sclk_default);
+
        return !!(feature_enabled & SMC_DPM_FEATURE);
 }
 
@@ -444,14 +451,14 @@ static int cyan_skillfish_od_edit_dpm_table(struct smu_context *smu,
                        return -EINVAL;
                }
 
-               if (input[1] <= CYAN_SKILLFISH_SCLK_MIN ||
+               if (input[1] < CYAN_SKILLFISH_SCLK_MIN ||
                        input[1] > CYAN_SKILLFISH_SCLK_MAX) {
                        dev_err(smu->adev->dev, "Invalid sclk! Valid sclk range: %uMHz - %uMhz\n",
                                        CYAN_SKILLFISH_SCLK_MIN, CYAN_SKILLFISH_SCLK_MAX);
                        return -EINVAL;
                }
 
-               if (input[2] <= CYAN_SKILLFISH_VDDC_MIN ||
+               if (input[2] < CYAN_SKILLFISH_VDDC_MIN ||
                        input[2] > CYAN_SKILLFISH_VDDC_MAX) {
                        dev_err(smu->adev->dev, "Invalid vddc! Valid vddc range: %umV - %umV\n",
                                        CYAN_SKILLFISH_VDDC_MIN, CYAN_SKILLFISH_VDDC_MAX);
@@ -468,7 +475,7 @@ static int cyan_skillfish_od_edit_dpm_table(struct smu_context *smu,
                        return -EINVAL;
                }
 
-               cyan_skillfish_user_settings.sclk = CYAN_SKILLFISH_SCLK_DEFAULT;
+               cyan_skillfish_user_settings.sclk = cyan_skillfish_sclk_default;
                cyan_skillfish_user_settings.vddc = CYAN_SKILLFISH_VDDC_MAGIC;
 
                break;