struct mclock_latency_table *mclk_latency_table;
};
+struct smu_power_gate {
+ bool uvd_gated;
+ bool vce_gated;
+};
+
struct smu_power_context {
void *power_context;
uint32_t power_context_size;
+ struct smu_power_gate power_gate;
};
static int navi10_dpm_set_uvd_enable(struct smu_context *smu, bool enable)
{
int ret = 0;
+ struct smu_power_context *smu_power = &smu->smu_power;
+ struct smu_power_gate *power_gate = &smu_power->power_gate;
- if (enable) {
+ if (enable && power_gate->uvd_gated) {
ret = smu_send_smc_msg_with_param(smu, SMU_MSG_PowerUpVcn, 1);
if (ret)
return ret;
+ power_gate->uvd_gated = false;
} else {
- ret = smu_send_smc_msg(smu, SMU_MSG_PowerDownVcn);
- if (ret)
- return ret;
+ if (!enable && !power_gate->uvd_gated) {
+ ret = smu_send_smc_msg(smu, SMU_MSG_PowerDownVcn);
+ if (ret)
+ return ret;
+ power_gate->uvd_gated = true;
+ }
}
return 0;