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i40e: simplify aq head-tail-len setups
authorShannon Nelson <shannon.nelson@intel.com>
Sat, 16 Nov 2013 10:00:36 +0000 (10:00 +0000)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Fri, 6 Dec 2013 07:12:58 +0000 (23:12 -0800)
Use more virtual registers to simplify code flows.

Change-Id: I32cff3818c5ca3a3792487ba4fed8f1d0ea6145a
Signed-off-by: Shannon Nelson <shannon.nelson@intel.com>
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Tested-by: Kavindya Deegala <kavindya.s.deegala@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/ethernet/intel/i40e/i40e_adminq.c
drivers/net/ethernet/intel/i40e/i40e_adminq.h

index 2bf73dd..92c01ad 100644 (file)
@@ -43,13 +43,17 @@ static void i40e_adminq_init_regs(struct i40e_hw *hw)
        if (hw->mac.type == I40E_MAC_VF) {
                hw->aq.asq.tail = I40E_VF_ATQT1;
                hw->aq.asq.head = I40E_VF_ATQH1;
+               hw->aq.asq.len  = I40E_VF_ATQLEN1;
                hw->aq.arq.tail = I40E_VF_ARQT1;
                hw->aq.arq.head = I40E_VF_ARQH1;
+               hw->aq.arq.len  = I40E_VF_ARQLEN1;
        } else {
                hw->aq.asq.tail = I40E_PF_ATQT;
                hw->aq.asq.head = I40E_PF_ATQH;
+               hw->aq.asq.len  = I40E_PF_ATQLEN;
                hw->aq.arq.tail = I40E_PF_ARQT;
                hw->aq.arq.head = I40E_PF_ARQH;
+               hw->aq.arq.len  = I40E_PF_ARQLEN;
        }
 }
 
@@ -466,15 +470,9 @@ static i40e_status i40e_shutdown_asq(struct i40e_hw *hw)
                return I40E_ERR_NOT_READY;
 
        /* Stop firmware AdminQ processing */
-       if (hw->mac.type == I40E_MAC_VF) {
-               wr32(hw, I40E_VF_ATQLEN1, 0);
-               wr32(hw, I40E_VF_ATQH1, 0);
-               wr32(hw, I40E_VF_ATQT1, 0);
-       } else {
-               wr32(hw, I40E_PF_ATQLEN, 0);
-               wr32(hw, I40E_PF_ATQH, 0);
-               wr32(hw, I40E_PF_ATQT, 0);
-       }
+       wr32(hw, hw->aq.asq.head, 0);
+       wr32(hw, hw->aq.asq.tail, 0);
+       wr32(hw, hw->aq.asq.len, 0);
 
        /* make sure lock is available */
        mutex_lock(&hw->aq.asq_mutex);
@@ -505,15 +503,9 @@ static i40e_status i40e_shutdown_arq(struct i40e_hw *hw)
                return I40E_ERR_NOT_READY;
 
        /* Stop firmware AdminQ processing */
-       if (hw->mac.type == I40E_MAC_VF) {
-               wr32(hw, I40E_VF_ARQLEN1, 0);
-               wr32(hw, I40E_VF_ARQH1, 0);
-               wr32(hw, I40E_VF_ARQT1, 0);
-       } else {
-               wr32(hw, I40E_PF_ARQLEN, 0);
-               wr32(hw, I40E_PF_ARQH, 0);
-               wr32(hw, I40E_PF_ARQT, 0);
-       }
+       wr32(hw, hw->aq.arq.head, 0);
+       wr32(hw, hw->aq.arq.tail, 0);
+       wr32(hw, hw->aq.arq.len, 0);
 
        /* make sure lock is available */
        mutex_lock(&hw->aq.arq_mutex);
@@ -966,27 +958,13 @@ void i40e_resume_aq(struct i40e_hw *hw)
        hw->aq.asq.next_to_clean = 0;
 
        i40e_config_asq_regs(hw);
-       reg = hw->aq.num_asq_entries;
-
-       if (hw->mac.type == I40E_MAC_VF) {
-               reg |= I40E_VF_ATQLEN_ATQENABLE_MASK;
-               wr32(hw, I40E_VF_ATQLEN1, reg);
-       } else {
-               reg |= I40E_PF_ATQLEN_ATQENABLE_MASK;
-               wr32(hw, I40E_PF_ATQLEN, reg);
-       }
+       reg = hw->aq.num_asq_entries | I40E_PF_ATQLEN_ATQENABLE_MASK;
+       wr32(hw, hw->aq.asq.len, reg);
 
        hw->aq.arq.next_to_use = 0;
        hw->aq.arq.next_to_clean = 0;
 
        i40e_config_arq_regs(hw);
-       reg = hw->aq.num_arq_entries;
-
-       if (hw->mac.type == I40E_MAC_VF) {
-               reg |= I40E_VF_ATQLEN_ATQENABLE_MASK;
-               wr32(hw, I40E_VF_ARQLEN1, reg);
-       } else {
-               reg |= I40E_PF_ATQLEN_ATQENABLE_MASK;
-               wr32(hw, I40E_PF_ARQLEN, reg);
-       }
+       reg = hw->aq.num_arq_entries | I40E_PF_ATQLEN_ATQENABLE_MASK;
+       wr32(hw, hw->aq.arq.len, reg);
 }
index 22e5ed6..f8c2c44 100644 (file)
@@ -56,6 +56,7 @@ struct i40e_adminq_ring {
        /* used for queue tracking */
        u32 head;
        u32 tail;
+       u32 len;
 };
 
 /* ASQ transaction details */