OSDN Git Service

drm/amd/include:cleanup vega10 vce header files.
authorFeifei Xu <Feifei.Xu@amd.com>
Thu, 23 Nov 2017 06:08:34 +0000 (14:08 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 6 Dec 2017 17:48:19 +0000 (12:48 -0500)
Cleanup asic_reg/vega10/VCE folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
drivers/gpu/drm/amd/include/asic_reg/vce/vce_4_0_default.h [moved from drivers/gpu/drm/amd/include/asic_reg/vega10/VCE/vce_4_0_default.h with 100% similarity]
drivers/gpu/drm/amd/include/asic_reg/vce/vce_4_0_offset.h [moved from drivers/gpu/drm/amd/include/asic_reg/vega10/VCE/vce_4_0_offset.h with 100% similarity]
drivers/gpu/drm/amd/include/asic_reg/vce/vce_4_0_sh_mask.h [moved from drivers/gpu/drm/amd/include/asic_reg/vega10/VCE/vce_4_0_sh_mask.h with 100% similarity]

index 83e26ca..c122e95 100644 (file)
@@ -32,9 +32,9 @@
 #include "vega10/soc15ip.h"
 #include "uvd/uvd_7_0_offset.h"
 #include "uvd/uvd_7_0_sh_mask.h"
-#include "vega10/VCE/vce_4_0_offset.h"
-#include "vega10/VCE/vce_4_0_default.h"
-#include "vega10/VCE/vce_4_0_sh_mask.h"
+#include "vce/vce_4_0_offset.h"
+#include "vce/vce_4_0_default.h"
+#include "vce/vce_4_0_sh_mask.h"
 #include "vega10/NBIF/nbif_6_1_offset.h"
 #include "hdp/hdp_4_0_offset.h"
 #include "vega10/MMHUB/mmhub_1_0_offset.h"
index 7574554..1b28c91 100644 (file)
@@ -33,9 +33,9 @@
 #include "mmsch_v1_0.h"
 
 #include "vega10/soc15ip.h"
-#include "vega10/VCE/vce_4_0_offset.h"
-#include "vega10/VCE/vce_4_0_default.h"
-#include "vega10/VCE/vce_4_0_sh_mask.h"
+#include "vce/vce_4_0_offset.h"
+#include "vce/vce_4_0_default.h"
+#include "vce/vce_4_0_sh_mask.h"
 #include "vega10/MMHUB/mmhub_1_0_offset.h"
 #include "vega10/MMHUB/mmhub_1_0_sh_mask.h"