4k segment remapping added to test app.

diff --git a/tools/test-image/sample1.asm b/tools/test-image/sample1.asm
index 2c1e310..ce99126 100644 (file)
--- a/tools/test-image/sample1.asm
+++ b/tools/test-image/sample1.asm
@@ -287,6 +287,12 @@ palettes:
 string:\r
        .byte   "test2!"\r
 \r
+;;;for DE1 internal memory constraints.\r
+.segment "VECINFO_4k"\r
+       .word   nmi_test\r
+       .word   Reset\r
+       .word   $0000\r
+\r
 .segment "VECINFO"\r
        .word   nmi_test\r
        .word   Reset\r

diff --git a/tools/test-image/sample1.cfg b/tools/test-image/sample1.cfg
index a1d4bc2..7d06701 100644 (file)
--- a/tools/test-image/sample1.cfg
+++ b/tools/test-image/sample1.cfg
@@ -1,27 +1,30 @@
-# \83\81\83\82\83\8a\83}\83b\83v\r
-MEMORY {\r
-       HEADER:         start = $0000, size = $0010, file = %O, fill = yes;\r
-       ROMST:          start = $8000, size = $7ffa, type = ro, file = %O, fill = yes, define = yes;\r
-       ROMINFO:        start = $fffa, size = $0006, type = ro, file = %O, fill = yes, define = yes;\r
-       ROMCHR:         start = $0000, size = $2000, type = rw, define = yes;\r
-       ZP:             start = $0000, size = $0020, type = rw, define = yes;\r
-       RAM:            start = $0400, size = $0400, type = rw, define = yes;\r
-       STACK:          start = $0200, size = $0200, type = rw, define = yes;\r
-       SRAM:           start = $6000, size = $2000, type = rw, define = yes;\r
-}\r
-\r
-# \83Z\83O\83\81\83\93\83g\83}\83b\83v\r
-SEGMENTS {\r
-       HEADER:         load = HEADER,          type = ro;\r
-       STARTUP:        load = ROMST,           type = ro,      define = yes;\r
-       VECINFO:        load = ROMINFO,         type = ro,      define = yes;\r
-       RODATA:         load = ROMST,           type = ro,      define = yes;\r
-       DATA:           load = ROMST, run = RAM,type = rw,      define = yes;\r
-       BSS:            load = RAM,             type = bss,     define = yes;\r
-       ZEROPAGE:       load = ZP,              type = zp;\r
-       CODE:           load = ROMST,           type = ro,      define = yes;\r
-       CHARS:          load = ROMCHR,          type = ro;\r
-}\r
+# memory map
+MEMORY {
+       HEADER:         start = $0000, size = $0010, file = %O, fill = yes;
+       ROMST:          start = $8000, size = $1ffa, type = ro, file = %O, fill = yes, define = yes;
+       ROMINFO_4k:     start = $8ffa, size = $0006, type = ro, file = %O, fill = yes, define = yes;
+       ROMST_other:    start = $9000, size = $6ffa, type = ro, file = %O, fill = yes, define = yes;
+       ROMINFO:        start = $fffa, size = $0006, type = ro, file = %O, fill = yes, define = yes;
+       ROMCHR:         start = $0000, size = $2000, type = rw, define = yes;
+       ZP:                 start = $0000, size = $0020, type = rw, define = yes;
+       RAM:            start = $0400, size = $0400, type = rw, define = yes;
+       STACK:          start = $0200, size = $0200, type = rw, define = yes;
+       SRAM:           start = $6000, size = $2000, type = rw, define = yes;
+}
+
+# segment map
+SEGMENTS {
+       HEADER:         load = HEADER,          type = ro;
+       STARTUP:        load = ROMST,           type = ro,      define = yes;
+       VECINFO_4k:     load = ROMINFO_4k,  type = ro,  define = yes;
+       VECINFO:        load = ROMINFO,         type = ro,      define = yes;
+       RODATA:         load = ROMST,           type = ro,      define = yes;
+       DATA:           load = ROMST, run = RAM,type = rw,      define = yes;
+       BSS:            load = RAM,                 type = bss, define = yes;
+       ZEROPAGE:       load = ZP,                  type = zp;
+       CODE:           load = ROMST,           type = ro,      define = yes;
+       CHARS:          load = ROMCHR,          type = ro;
+}
 
 FEATURES {
        CONDES: segment = RODATA,