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drm/amdgpu: remove unnecessary debug message
authorHawking Zhang <Hawking.Zhang@amd.com>
Thu, 25 May 2017 08:15:10 +0000 (16:15 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 31 May 2017 18:16:32 +0000 (14:16 -0400)
remnants from bring-up.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

index ac9c95c..b7bce90 100644 (file)
@@ -56,7 +56,6 @@ int mmhub_v1_0_gart_enable(struct amdgpu_device *adev)
 
        /* Program MC. */
        /* Update configuration */
-       DRM_INFO("%s -- in\n", __func__);
        WREG32(SOC15_REG_OFFSET(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR),
                adev->mc.vram_start >> 18);
        WREG32(SOC15_REG_OFFSET(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR),
index 332f2fd..de37e84 100644 (file)
@@ -150,20 +150,6 @@ static void sdma_v4_0_init_golden_registers(struct amdgpu_device *adev)
        }
 }
 
-static void sdma_v4_0_print_ucode_regs(void *handle)
-{
-       int i;
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-
-       dev_info(adev->dev, "VEGA10 SDMA ucode registers\n");
-       for (i = 0; i < adev->sdma.num_instances; i++) {
-               dev_info(adev->dev, "  SDMA%d_UCODE_ADDR=0x%08X\n",
-                        i, RREG32(sdma_v4_0_get_reg_offset(i, mmSDMA0_UCODE_ADDR)));
-               dev_info(adev->dev, "  SDMA%d_UCODE_CHECKSUM=0x%08X\n",
-                        i, RREG32(sdma_v4_0_get_reg_offset(i, mmSDMA0_UCODE_CHECKSUM)));
-       }
-}
-
 /**
  * sdma_v4_0_init_microcode - load ucode images from disk
  *
@@ -804,8 +790,6 @@ static int sdma_v4_0_load_microcode(struct amdgpu_device *adev)
                WREG32(sdma_v4_0_get_reg_offset(i, mmSDMA0_UCODE_ADDR), adev->sdma.instance[i].fw_version);
        }
 
-       sdma_v4_0_print_ucode_regs(adev);
-
        return 0;
 }
 
@@ -831,7 +815,6 @@ static int sdma_v4_0_start(struct amdgpu_device *adev)
        }
 
        if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) {
-               DRM_INFO("Loading via direct write\n");
                r = sdma_v4_0_load_microcode(adev);
                if (r)
                        return r;
@@ -869,8 +852,6 @@ static int sdma_v4_0_ring_test_ring(struct amdgpu_ring *ring)
        u32 tmp;
        u64 gpu_addr;
 
-       DRM_INFO("In Ring test func\n");
-
        r = amdgpu_wb_get(adev, &index);
        if (r) {
                dev_err(adev->dev, "(%d) failed to allocate wb slot\n", r);