{ 0, NULL},
};
+static int arm_smmu_enable_clocks_atomic(struct arm_smmu_device *smmu);
+static void arm_smmu_disable_clocks_atomic(struct arm_smmu_device *smmu);
+static void arm_smmu_prepare_pgtable(void *addr, void *cookie);
+static void arm_smmu_unprepare_pgtable(void *cookie, void *addr, size_t size);
+static phys_addr_t arm_smmu_iova_to_phys_hard(struct iommu_domain *domain,
+ dma_addr_t iova);
+static phys_addr_t arm_smmu_iova_to_phys_hard_no_halt(
+ struct iommu_domain *domain, dma_addr_t iova);
+static int arm_smmu_wait_for_halt(struct arm_smmu_device *smmu);
+static int arm_smmu_halt_nowait(struct arm_smmu_device *smmu);
+static void arm_smmu_resume(struct arm_smmu_device *smmu);
+static phys_addr_t arm_smmu_iova_to_phys(struct iommu_domain *domain,
+ dma_addr_t iova);
+static int arm_smmu_assign_table(struct arm_smmu_domain *smmu_domain);
+static void arm_smmu_unassign_table(struct arm_smmu_domain *smmu_domain);
+static int arm_smmu_halt(struct arm_smmu_device *smmu);
+static void arm_smmu_device_reset(struct arm_smmu_device *smmu);
+static size_t arm_smmu_unmap(struct iommu_domain *domain, unsigned long iova,
+ size_t size);
+
+
static void parse_driver_options(struct arm_smmu_device *smmu)
{
int i = 0;
return ret;
}
-static int arm_smmu_enable_clocks_atomic(struct arm_smmu_device *smmu);
-static void arm_smmu_disable_clocks_atomic(struct arm_smmu_device *smmu);
-
static int arm_smmu_enable_clocks(struct arm_smmu_device *smmu)
{
int ret = 0;
}
}
-static void arm_smmu_prepare_pgtable(void *addr, void *cookie);
-static void arm_smmu_unprepare_pgtable(void *cookie, void *addr, size_t size);
-
static void *arm_smmu_alloc_pages_exact(void *cookie,
size_t size, gfp_t gfp_mask)
{
.free_pages_exact = arm_smmu_free_pages_exact,
};
-static phys_addr_t arm_smmu_iova_to_phys_hard(struct iommu_domain *domain,
- dma_addr_t iova);
-static phys_addr_t arm_smmu_iova_to_phys_hard_no_halt(
- struct iommu_domain *domain, dma_addr_t iova);
-static int arm_smmu_wait_for_halt(struct arm_smmu_device *smmu);
-static int arm_smmu_halt_nowait(struct arm_smmu_device *smmu);
-static void arm_smmu_resume(struct arm_smmu_device *smmu);
-static phys_addr_t arm_smmu_iova_to_phys(struct iommu_domain *domain,
- dma_addr_t iova);
-
static phys_addr_t arm_smmu_verify_fault(struct iommu_domain *domain,
dma_addr_t iova, u32 fsr)
{
writel_relaxed(reg, cb_base + ARM_SMMU_CB_SCTLR);
}
-static int arm_smmu_assign_table(struct arm_smmu_domain *smmu_domain);
-
static bool arm_smmu_is_domain_secure(struct arm_smmu_domain *smmu_domain)
{
return (smmu_domain->secure_vmid != VMID_INVAL);
return ret;
}
-static void arm_smmu_unassign_table(struct arm_smmu_domain *smmu_domain);
-
static void arm_smmu_destroy_domain_context(struct iommu_domain *domain)
{
struct arm_smmu_domain *smmu_domain = domain->priv;
arm_smmu_disable_clocks(smmu);
}
-static int arm_smmu_halt(struct arm_smmu_device *smmu);
-static void arm_smmu_resume(struct arm_smmu_device *smmu);
-
static void arm_smmu_impl_def_programming(struct arm_smmu_device *smmu)
{
int i;
arm_smmu_resume(smmu);
}
-static void arm_smmu_device_reset(struct arm_smmu_device *smmu);
-
static int arm_smmu_attach_dynamic(struct iommu_domain *domain,
struct arm_smmu_device *smmu)
{
return ret;
}
-static size_t arm_smmu_unmap(struct iommu_domain *domain, unsigned long iova,
- size_t size);
static size_t arm_smmu_map_sg(struct iommu_domain *domain, unsigned long iova,
struct scatterlist *sg, unsigned int nents, int prot)
{