vram timing changed.

diff --git a/de1_nes/de1_nes.vhd b/de1_nes/de1_nes.vhd
index 33a8f64..a8276ba 100644 (file)
--- a/de1_nes/de1_nes.vhd
+++ b/de1_nes/de1_nes.vhd
@@ -109,16 +109,26 @@ architecture rtl of de1_nes is
     );
     end component;
 
-    component ram
-        generic (abus_size : integer := 16; dbus_size : integer := 8);
-        port (  
-                clk               : in std_logic;
-                ce_n, oe_n, we_n  : in std_logic;   --select pin active low.
-                addr              : in std_logic_vector (abus_size - 1 downto 0);
-                d_io              : inout std_logic_vector (dbus_size - 1 downto 0)
-        );
-    end component;
-
+    component tss_ram\r
+        generic (abus_size : integer := 16; dbus_size : integer := 8);\r
+        port (  \r
+                clk               : in std_logic;\r
+                ce_n, oe_n, we_n  : in std_logic;   --select pin active low.\r
+                addr              : in std_logic_vector (abus_size - 1 downto 0);\r
+                d_io              : inout std_logic_vector (dbus_size - 1 downto 0)\r
+        );\r
+    end component;\r
+\r
+    component ram\r
+        generic (abus_size : integer := 16; dbus_size : integer := 8);\r
+        port (  \r
+                clk               : in std_logic;\r
+                ce_n, oe_n, we_n  : in std_logic;   --select pin active low.\r
+                addr              : in std_logic_vector (abus_size - 1 downto 0);\r
+                d_io              : inout std_logic_vector (dbus_size - 1 downto 0)\r
+        );\r
+    end component;\r
+\r
     component prg_rom
         generic (abus_size : integer := 15; dbus_size : integer := 8);
         port (
@@ -329,7 +339,7 @@ begin
             port map (cpu_mem_clk, rom_ce_n, addr(rom_8k - 1 downto 0), d_io);
 
     ram_oe_n <= not R_nW;
-    prg_ram_inst : ram generic map (ram_2k, data_size)
+    prg_ram_inst : tss_ram generic map (ram_2k, data_size)
             port map (cpu_mem_clk, ram_ce_n, ram_oe_n, R_nW, addr(ram_2k - 1 downto 0), d_io);
 
     --nes ppu instance

diff --git a/de1_nes/ppu/vga_ppu.vhd b/de1_nes/ppu/vga_ppu.vhd
index b0f923a..fac4edd 100644 (file)
--- a/de1_nes/ppu/vga_ppu.vhd
+++ b/de1_nes/ppu/vga_ppu.vhd
@@ -1014,7 +1014,6 @@ begin
                     d_print("*");\r
                     d_print("nes_x: " & conv_hex16(conv_integer(nes_x)));\r
                     d_print("nes_y: " & conv_hex16(conv_integer(nes_y)));\r
-                    --all cycls is delayed by two clocks.\r
 \r
                     ----fetch next tile byte.\r
                     if (prf_x (2 downto 0) = "010") then\r