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net: phy: dp83867: increase SGMII autoneg timer duration
authorMax Uvarov <muvarov@gmail.com>
Tue, 28 May 2019 10:00:50 +0000 (13:00 +0300)
committerDavid S. Miller <davem@davemloft.net>
Wed, 29 May 2019 21:28:48 +0000 (14:28 -0700)
After reset SGMII Autoneg timer is set to 2us (bits 6 and 5 are 01).
That is not enough to finalize autonegatiation on some devices.
Increase this timer duration to maximum supported 16ms.

Signed-off-by: Max Uvarov <muvarov@gmail.com>
Cc: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/phy/dp83867.c

index 1091a62..14e9e8a 100644 (file)
 
 /* Extended Registers */
 #define DP83867_CFG4            0x0031
+#define DP83867_CFG4_SGMII_ANEG_MASK (BIT(5) | BIT(6))
+#define DP83867_CFG4_SGMII_ANEG_TIMER_11MS   (3 << 5)
+#define DP83867_CFG4_SGMII_ANEG_TIMER_800US  (2 << 5)
+#define DP83867_CFG4_SGMII_ANEG_TIMER_2US    (1 << 5)
+#define DP83867_CFG4_SGMII_ANEG_TIMER_16MS   (0 << 5)
+
 #define DP83867_RGMIICTL       0x0032
 #define DP83867_STRAP_STS1     0x006E
 #define DP83867_RGMIIDCTL      0x0086
@@ -292,6 +298,18 @@ static int dp83867_config_init(struct phy_device *phydev)
                                     0);
                if (ret)
                        return ret;
+
+               /* After reset SGMII Autoneg timer is set to 2us (bits 6 and 5
+                * are 01). That is not enough to finalize autoneg on some
+                * devices. Increase this timer duration to maximum 16ms.
+                */
+               ret = phy_modify_mmd(phydev, DP83867_DEVADDR,
+                                    DP83867_CFG4,
+                                    DP83867_CFG4_SGMII_ANEG_MASK,
+                                    DP83867_CFG4_SGMII_ANEG_TIMER_16MS);
+
+               if (ret)
+                       return ret;
        }
 
        /* Enable Interrupt output INT_OE in CFG3 register */