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RDMA/mlx5: Set user priority for DCT
author
Patrisious Haddad
<phaddad@nvidia.com>
Wed, 6 Oct 2021 09:31:53 +0000
(12:31 +0300)
committer
Jason Gunthorpe
<jgg@nvidia.com>
Wed, 6 Oct 2021 19:39:52 +0000
(16:39 -0300)
Currently, the driver doesn't set the PCP-based priority for DCT, hence
DCT response packets are transmitted without user priority.
Fix it by setting user provided priority in the eth_prio field in the DCT
context, which in turn sets the value in the transmitted packet.
Fixes:
776a3906b692
("IB/mlx5: Add support for DC target QP")
Link:
https://lore.kernel.org/r/5fd2d94a13f5742d8803c218927322257d53205c.1633512672.git.leonro@nvidia.com
Signed-off-by: Patrisious Haddad <phaddad@nvidia.com>
Reviewed-by: Maor Gottlieb <maorg@nvidia.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
drivers/infiniband/hw/mlx5/qp.c
patch
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diff --git
a/drivers/infiniband/hw/mlx5/qp.c
b/drivers/infiniband/hw/mlx5/qp.c
index
b2fca11
..
e5abbcf
100644
(file)
--- a/
drivers/infiniband/hw/mlx5/qp.c
+++ b/
drivers/infiniband/hw/mlx5/qp.c
@@
-4458,6
+4458,8
@@
static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr,
MLX5_SET(dctc, dctc, mtu, attr->path_mtu);
MLX5_SET(dctc, dctc, my_addr_index, attr->ah_attr.grh.sgid_index);
MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit);
+ if (attr->ah_attr.type == RDMA_AH_ATTR_TYPE_ROCE)
+ MLX5_SET(dctc, dctc, eth_prio, attr->ah_attr.sl & 0x7);
err = mlx5_core_create_dct(dev, &qp->dct.mdct, qp->dct.in,
MLX5_ST_SZ_BYTES(create_dct_in), out,