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Update for feedback from Jim.
author
Owen Anderson
<resistor@mac.com>
Fri, 26 Aug 2011 19:39:26 +0000
(19:39 +0000)
committer
Owen Anderson
<resistor@mac.com>
Fri, 26 Aug 2011 19:39:26 +0000
(19:39 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138642
91177308
-0d34-0410-b5e6-
96231b3b80d8
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
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diff --git
a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index
7652e80
..
b58cca3
100644
(file)
--- a/
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@
-2319,13
+2319,13
@@
static DecodeStatus DecodeThumbAddSpecialReg(llvm::MCInst &Inst, uint16_t Insn,
CHECK(S, DecodetGPRRegisterClass(Inst, dst, Address, Decoder));
switch(Inst.getOpcode()) {
+ default:
+ return Fail;
case ARM::tADR:
- break;
+ break;
// tADR does not explicitly represent the PC as an oeprand.
case ARM::tADDrSPi:
Inst.addOperand(MCOperand::CreateReg(ARM::SP));
break;
- default:
- return Fail;
}
Inst.addOperand(MCOperand::CreateImm(imm));