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drm/amdgpu: use the maximum possible fragment size on Vega/Raven
authorChristian König <christian.koenig@amd.com>
Fri, 7 Sep 2018 12:21:15 +0000 (14:21 +0200)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 13 Sep 2018 20:14:10 +0000 (15:14 -0500)
The fragment size controls only the L1 on Vega/Raven and we now don't
have any extra overhead any more because of larger fragments.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

index 4534350..2d2d619 100644 (file)
@@ -1540,8 +1540,16 @@ static void amdgpu_vm_fragment(struct amdgpu_pte_update_params *params,
         * larger. Thus, we try to use large fragments wherever possible.
         * Userspace can support this by aligning virtual base address and
         * allocation size to the fragment size.
+        *
+        * Starting with Vega10 the fragment size only controls the L1. The L2
+        * is now directly feed with small/huge/giant pages from the walker.
         */
-       unsigned max_frag = params->adev->vm_manager.fragment_size;
+       unsigned max_frag;
+
+       if (params->adev->asic_type < CHIP_VEGA10)
+               max_frag = params->adev->vm_manager.fragment_size;
+       else
+               max_frag = 31;
 
        /* system pages are non continuously */
        if (params->src || !(flags & AMDGPU_PTE_VALID)) {