[X86][BtVer2] Improve simulation of (V)PINSR values

Include the 6cy delay transferring from the GPR to FPU.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332737 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86ScheduleBtVer2.td b/lib/Target/X86/X86ScheduleBtVer2.td
index 248939c..361ae95 100644 (file)
--- a/lib/Target/X86/X86ScheduleBtVer2.td
+++ b/lib/Target/X86/X86ScheduleBtVer2.td
@@ -461,9 +461,10 @@ defm : JWriteResFpuPair<WriteVarVecShiftY,[JFPU01, JVALU], 1>; // NOTE: Doesn't
 // Vector insert/extract operations.
 ////////////////////////////////////////////////////////////////////////////////
 
-defm : JWriteResFpuPair<WriteVecInsert,   [JFPU01, JVALU], 1>;
-def  : WriteRes<WriteVecExtract,     [JFPU0, JFPA, JALU0]> { let Latency = 3; }
-def  : WriteRes<WriteVecExtractSt,   [JFPU1, JSTC, JSAGU]> { let Latency = 3; }
+defm : X86WriteRes<WriteVecInsert,      [JFPU01, JVALU], 7, [1,1], 2>;
+defm : X86WriteRes<WriteVecInsertLd,    [JFPU01, JVALU, JLAGU], 4, [1,1,1], 1>;
+defm : X86WriteRes<WriteVecExtract,     [JFPU0, JFPA, JALU0], 3, [1,1,1], 1>;
+defm : X86WriteRes<WriteVecExtractSt,   [JFPU1, JSTC, JSAGU], 3, [1,1,1], 1>;
 
 ////////////////////////////////////////////////////////////////////////////////
 // SSE42 String instructions.

diff --git a/test/CodeGen/X86/mmx-schedule.ll b/test/CodeGen/X86/mmx-schedule.ll
index 908fb1e..275b3fe 100644 (file)
--- a/test/CodeGen/X86/mmx-schedule.ll
+++ b/test/CodeGen/X86/mmx-schedule.ll
@@ -3565,9 +3565,9 @@ define i64 @test_pinsrw(x86_mmx %a0, i32 %a1, i16* %a2) optsize {
 ;
 ; BTVER2-LABEL: test_pinsrw:
 ; BTVER2:       # %bb.0:
+; BTVER2-NEXT:    pinsrw $0, %edi, %mm0 # sched: [7:0.50]
 ; BTVER2-NEXT:    movswl (%rsi), %eax # sched: [4:1.00]
-; BTVER2-NEXT:    pinsrw $0, %edi, %mm0 # sched: [1:0.50]
-; BTVER2-NEXT:    pinsrw $1, %eax, %mm0 # sched: [1:0.50]
+; BTVER2-NEXT:    pinsrw $1, %eax, %mm0 # sched: [7:0.50]
 ; BTVER2-NEXT:    movq %mm0, %rax # sched: [1:0.50]
 ; BTVER2-NEXT:    retq # sched: [4:1.00]
 ;

diff --git a/test/CodeGen/X86/sse2-schedule.ll b/test/CodeGen/X86/sse2-schedule.ll
index 5c958f8..639360d 100644 (file)
--- a/test/CodeGen/X86/sse2-schedule.ll
+++ b/test/CodeGen/X86/sse2-schedule.ll
@@ -9080,14 +9080,14 @@ define <8 x i16> @test_pinsrw(<8 x i16> %a0, i16 %a1, i16 *%a2) {
 ;
 ; BTVER2-SSE-LABEL: test_pinsrw:
 ; BTVER2-SSE:       # %bb.0:
-; BTVER2-SSE-NEXT:    pinsrw $1, %edi, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT:    pinsrw $3, (%rsi), %xmm0 # sched: [6:1.00]
+; BTVER2-SSE-NEXT:    pinsrw $1, %edi, %xmm0 # sched: [7:0.50]
+; BTVER2-SSE-NEXT:    pinsrw $3, (%rsi), %xmm0 # sched: [4:1.00]
 ; BTVER2-SSE-NEXT:    retq # sched: [4:1.00]
 ;
 ; BTVER2-LABEL: test_pinsrw:
 ; BTVER2:       # %bb.0:
-; BTVER2-NEXT:    vpinsrw $1, %edi, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT:    vpinsrw $3, (%rsi), %xmm0, %xmm0 # sched: [6:1.00]
+; BTVER2-NEXT:    vpinsrw $1, %edi, %xmm0, %xmm0 # sched: [7:0.50]
+; BTVER2-NEXT:    vpinsrw $3, (%rsi), %xmm0, %xmm0 # sched: [4:1.00]
 ; BTVER2-NEXT:    retq # sched: [4:1.00]
 ;
 ; ZNVER1-SSE-LABEL: test_pinsrw:

diff --git a/test/CodeGen/X86/sse41-schedule.ll b/test/CodeGen/X86/sse41-schedule.ll
index 50a4253..84f0384 100644 (file)
--- a/test/CodeGen/X86/sse41-schedule.ll
+++ b/test/CodeGen/X86/sse41-schedule.ll
@@ -2180,14 +2180,14 @@ define <16 x i8> @test_pinsrb(<16 x i8> %a0, i8 %a1, i8 *%a2) {
 ;
 ; BTVER2-SSE-LABEL: test_pinsrb:
 ; BTVER2-SSE:       # %bb.0:
-; BTVER2-SSE-NEXT:    pinsrb $1, %edi, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT:    pinsrb $3, (%rsi), %xmm0 # sched: [6:1.00]
+; BTVER2-SSE-NEXT:    pinsrb $1, %edi, %xmm0 # sched: [7:0.50]
+; BTVER2-SSE-NEXT:    pinsrb $3, (%rsi), %xmm0 # sched: [4:1.00]
 ; BTVER2-SSE-NEXT:    retq # sched: [4:1.00]
 ;
 ; BTVER2-LABEL: test_pinsrb:
 ; BTVER2:       # %bb.0:
-; BTVER2-NEXT:    vpinsrb $1, %edi, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT:    vpinsrb $3, (%rsi), %xmm0, %xmm0 # sched: [6:1.00]
+; BTVER2-NEXT:    vpinsrb $1, %edi, %xmm0, %xmm0 # sched: [7:0.50]
+; BTVER2-NEXT:    vpinsrb $3, (%rsi), %xmm0, %xmm0 # sched: [4:1.00]
 ; BTVER2-NEXT:    retq # sched: [4:1.00]
 ;
 ; ZNVER1-SSE-LABEL: test_pinsrb:
@@ -2282,14 +2282,14 @@ define <4 x i32> @test_pinsrd(<4 x i32> %a0, i32 %a1, i32 *%a2) {
 ;
 ; BTVER2-SSE-LABEL: test_pinsrd:
 ; BTVER2-SSE:       # %bb.0:
-; BTVER2-SSE-NEXT:    pinsrd $1, %edi, %xmm0 # sched: [1:0.50]
-; BTVER2-SSE-NEXT:    pinsrd $3, (%rsi), %xmm0 # sched: [6:1.00]
+; BTVER2-SSE-NEXT:    pinsrd $1, %edi, %xmm0 # sched: [7:0.50]
+; BTVER2-SSE-NEXT:    pinsrd $3, (%rsi), %xmm0 # sched: [4:1.00]
 ; BTVER2-SSE-NEXT:    retq # sched: [4:1.00]
 ;
 ; BTVER2-LABEL: test_pinsrd:
 ; BTVER2:       # %bb.0:
-; BTVER2-NEXT:    vpinsrd $1, %edi, %xmm0, %xmm0 # sched: [1:0.50]
-; BTVER2-NEXT:    vpinsrd $3, (%rsi), %xmm0, %xmm0 # sched: [6:1.00]
+; BTVER2-NEXT:    vpinsrd $1, %edi, %xmm0, %xmm0 # sched: [7:0.50]
+; BTVER2-NEXT:    vpinsrd $3, (%rsi), %xmm0, %xmm0 # sched: [4:1.00]
 ; BTVER2-NEXT:    retq # sched: [4:1.00]
 ;
 ; ZNVER1-SSE-LABEL: test_pinsrd:
@@ -2396,15 +2396,15 @@ define <2 x i64> @test_pinsrq(<2 x i64> %a0, <2 x i64> %a1, i64 %a2, i64 *%a3) {
 ;
 ; BTVER2-SSE-LABEL: test_pinsrq:
 ; BTVER2-SSE:       # %bb.0:
-; BTVER2-SSE-NEXT:    pinsrq $1, (%rsi), %xmm1 # sched: [6:1.00]
-; BTVER2-SSE-NEXT:    pinsrq $1, %rdi, %xmm0 # sched: [1:0.50]
+; BTVER2-SSE-NEXT:    pinsrq $1, %rdi, %xmm0 # sched: [7:0.50]
+; BTVER2-SSE-NEXT:    pinsrq $1, (%rsi), %xmm1 # sched: [4:1.00]
 ; BTVER2-SSE-NEXT:    paddq %xmm1, %xmm0 # sched: [1:0.50]
 ; BTVER2-SSE-NEXT:    retq # sched: [4:1.00]
 ;
 ; BTVER2-LABEL: test_pinsrq:
 ; BTVER2:       # %bb.0:
-; BTVER2-NEXT:    vpinsrq $1, (%rsi), %xmm1, %xmm1 # sched: [6:1.00]
-; BTVER2-NEXT:    vpinsrq $1, %rdi, %xmm0, %xmm0 # sched: [1:0.50]
+; BTVER2-NEXT:    vpinsrq $1, %rdi, %xmm0, %xmm0 # sched: [7:0.50]
+; BTVER2-NEXT:    vpinsrq $1, (%rsi), %xmm1, %xmm1 # sched: [4:1.00]
 ; BTVER2-NEXT:    vpaddq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
 ; BTVER2-NEXT:    retq # sched: [4:1.00]
 ;

diff --git a/test/tools/llvm-mca/X86/BtVer2/resources-avx1.s b/test/tools/llvm-mca/X86/BtVer2/resources-avx1.s
index 4803665..a1d01e4 100644 (file)
--- a/test/tools/llvm-mca/X86/BtVer2/resources-avx1.s
+++ b/test/tools/llvm-mca/X86/BtVer2/resources-avx1.s
@@ -1449,14 +1449,14 @@ vzeroupper
 # CHECK-NEXT:  1      6     1.00    *                   vphsubsw       (%rax), %xmm1, %xmm2
 # CHECK-NEXT:  1      1     0.50                        vphsubw        %xmm0, %xmm1, %xmm2
 # CHECK-NEXT:  1      6     1.00    *                   vphsubw        (%rax), %xmm1, %xmm2
-# CHECK-NEXT:  1      1     0.50                        vpinsrb        $1, %eax, %xmm1, %xmm2
-# CHECK-NEXT:  1      6     1.00    *                   vpinsrb        $1, (%rax), %xmm1, %xmm2
-# CHECK-NEXT:  1      1     0.50                        vpinsrd        $1, %eax, %xmm1, %xmm2
-# CHECK-NEXT:  1      6     1.00    *                   vpinsrd        $1, (%rax), %xmm1, %xmm2
-# CHECK-NEXT:  1      1     0.50                        vpinsrq        $1, %rax, %xmm1, %xmm2
-# CHECK-NEXT:  1      6     1.00    *                   vpinsrq        $1, (%rax), %xmm1, %xmm2
-# CHECK-NEXT:  1      1     0.50                        vpinsrw        $1, %eax, %xmm1, %xmm2
-# CHECK-NEXT:  1      6     1.00    *                   vpinsrw        $1, (%rax), %xmm1, %xmm2
+# CHECK-NEXT:  2      7     0.50                        vpinsrb        $1, %eax, %xmm1, %xmm2
+# CHECK-NEXT:  1      4     1.00    *                   vpinsrb        $1, (%rax), %xmm1, %xmm2
+# CHECK-NEXT:  2      7     0.50                        vpinsrd        $1, %eax, %xmm1, %xmm2
+# CHECK-NEXT:  1      4     1.00    *                   vpinsrd        $1, (%rax), %xmm1, %xmm2
+# CHECK-NEXT:  2      7     0.50                        vpinsrq        $1, %rax, %xmm1, %xmm2
+# CHECK-NEXT:  1      4     1.00    *                   vpinsrq        $1, (%rax), %xmm1, %xmm2
+# CHECK-NEXT:  2      7     0.50                        vpinsrw        $1, %eax, %xmm1, %xmm2
+# CHECK-NEXT:  1      4     1.00    *                   vpinsrw        $1, (%rax), %xmm1, %xmm2
 # CHECK-NEXT:  1      2     1.00                        vpmaddubsw     %xmm0, %xmm1, %xmm2
 # CHECK-NEXT:  1      7     1.00    *                   vpmaddubsw     (%rax), %xmm1, %xmm2
 # CHECK-NEXT:  1      2     1.00                        vpmaddwd       %xmm0, %xmm1, %xmm2

diff --git a/test/tools/llvm-mca/X86/BtVer2/resources-sse1.s b/test/tools/llvm-mca/X86/BtVer2/resources-sse1.s
index de22b3a..93992cd 100644 (file)
--- a/test/tools/llvm-mca/X86/BtVer2/resources-sse1.s
+++ b/test/tools/llvm-mca/X86/BtVer2/resources-sse1.s
@@ -269,8 +269,8 @@ xorps       (%rax), %xmm2
 # CHECK-NEXT:  1      1     0.50                        pavgw  %mm0, %mm2
 # CHECK-NEXT:  1      6     1.00    *                   pavgw  (%rax), %mm2
 # CHECK-NEXT:  1      3     1.00                        pextrw $1, %mm0, %ecx
-# CHECK-NEXT:  1      1     0.50                        pinsrw $1, %eax, %mm2
-# CHECK-NEXT:  1      6     1.00    *                   pinsrw $1, (%rax), %mm2
+# CHECK-NEXT:  2      7     0.50                        pinsrw $1, %eax, %mm2
+# CHECK-NEXT:  1      4     1.00    *                   pinsrw $1, (%rax), %mm2
 # CHECK-NEXT:  1      1     0.50                        pmaxsw %mm0, %mm2
 # CHECK-NEXT:  1      6     1.00    *                   pmaxsw (%rax), %mm2
 # CHECK-NEXT:  1      1     0.50                        pmaxub %mm0, %mm2

diff --git a/test/tools/llvm-mca/X86/BtVer2/resources-sse41.s b/test/tools/llvm-mca/X86/BtVer2/resources-sse41.s
index ed8d7f5..5e02b81 100644 (file)
--- a/test/tools/llvm-mca/X86/BtVer2/resources-sse41.s
+++ b/test/tools/llvm-mca/X86/BtVer2/resources-sse41.s
@@ -191,12 +191,12 @@ roundss     $1, (%rax), %xmm2
 # CHECK-NEXT:  1      3     1.00           *            pextrw $1, %xmm0, (%rax)
 # CHECK-NEXT:  1      2     1.00                        phminposuw     %xmm0, %xmm2
 # CHECK-NEXT:  1      7     1.00    *                   phminposuw     (%rax), %xmm2
-# CHECK-NEXT:  1      1     0.50                        pinsrb $1, %eax, %xmm1
-# CHECK-NEXT:  1      6     1.00    *                   pinsrb $1, (%rax), %xmm1
-# CHECK-NEXT:  1      1     0.50                        pinsrd $1, %eax, %xmm1
-# CHECK-NEXT:  1      6     1.00    *                   pinsrd $1, (%rax), %xmm1
-# CHECK-NEXT:  1      1     0.50                        pinsrq $1, %rax, %xmm1
-# CHECK-NEXT:  1      6     1.00    *                   pinsrq $1, (%rax), %xmm1
+# CHECK-NEXT:  2      7     0.50                        pinsrb $1, %eax, %xmm1
+# CHECK-NEXT:  1      4     1.00    *                   pinsrb $1, (%rax), %xmm1
+# CHECK-NEXT:  2      7     0.50                        pinsrd $1, %eax, %xmm1
+# CHECK-NEXT:  1      4     1.00    *                   pinsrd $1, (%rax), %xmm1
+# CHECK-NEXT:  2      7     0.50                        pinsrq $1, %rax, %xmm1
+# CHECK-NEXT:  1      4     1.00    *                   pinsrq $1, (%rax), %xmm1
 # CHECK-NEXT:  1      1     0.50                        pmaxsb %xmm0, %xmm2
 # CHECK-NEXT:  1      6     1.00    *                   pmaxsb (%rax), %xmm2
 # CHECK-NEXT:  1      1     0.50                        pmaxsd %xmm0, %xmm2