PCI_BASE_ADDRESS_MEM_PREFETCH, &n->pmrdev->mr);
}
-static void nvme_init_pci(NvmeCtrl *n, PCIDevice *pci_dev)
+static void nvme_init_pci(NvmeCtrl *n, PCIDevice *pci_dev, Error **errp)
{
uint8_t *pci_conf = pci_dev->config;
n->reg_size);
pci_register_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY |
PCI_BASE_ADDRESS_MEM_TYPE_64, &n->iomem);
- msix_init_exclusive_bar(pci_dev, n->params.msix_qsize, 4, NULL);
+ if (msix_init_exclusive_bar(pci_dev, n->params.msix_qsize, 4, errp)) {
+ return;
+ }
if (n->params.cmb_size_mb) {
nvme_init_cmb(n, pci_dev);
return;
}
- nvme_init_pci(n, pci_dev);
+ nvme_init_pci(n, pci_dev, &local_err);
+ if (local_err) {
+ error_propagate(errp, local_err);
+ return;
+ }
+
nvme_init_ctrl(n, pci_dev);
for (i = 0; i < n->num_namespaces; i++) {