ARM: dts: msm: Add compute context banks for msmfalcon

Enable FastRPC by supporting new context banks on CDSP
and ADSP for msmfalcon.

Change-Id: I992dbe23baf9a159e513c57b0a5f24e14d9b391d
Acked-by: Chenna Kesava Raju <chennak@qti.qualcomm.com>
Signed-off-by: Sathish Ambley <sathishambley@codeaurora.org>

diff --git a/arch/arm/boot/dts/qcom/msmfalcon.dtsi b/arch/arm/boot/dts/qcom/msmfalcon.dtsi
index de0c111..d97bc47 100644 (file)
--- a/arch/arm/boot/dts/qcom/msmfalcon.dtsi
+++ b/arch/arm/boot/dts/qcom/msmfalcon.dtsi
@@ -1020,6 +1020,98 @@
                qcom,mpu-enabled;
        };
 
+
+       qcom,msm-adsprpc-mem {
+               compatible = "qcom,msm-adsprpc-mem-region";
+               memory-region = <&adsp_mem>;
+       };
+
+       qcom,msm_fastrpc {
+               compatible = "qcom,msm-fastrpc-adsp";
+               qcom,fastrpc-glink;
+
+               qcom,msm_fastrpc_compute_cb1 {
+                       compatible = "qcom,msm-fastrpc-compute-cb";
+                       label = "adsprpc-smd";
+                       iommus = <&lpass_q6_smmu 3>;
+                       dma-coherent;
+               };
+               qcom,msm_fastrpc_compute_cb2 {
+                       compatible = "qcom,msm-fastrpc-compute-cb";
+                       label = "adsprpc-smd";
+                       iommus = <&lpass_q6_smmu 7>;
+                       dma-coherent;
+               };
+               qcom,msm_fastrpc_compute_cb3 {
+                       compatible = "qcom,msm-fastrpc-compute-cb";
+                       label = "adsprpc-smd";
+                       iommus = <&lpass_q6_smmu 8>;
+                       dma-coherent;
+               };
+               qcom,msm_fastrpc_compute_cb4 {
+                       compatible = "qcom,msm-fastrpc-compute-cb";
+                       label = "adsprpc-smd";
+                       iommus = <&lpass_q6_smmu 9>;
+                       dma-coherent;
+               };
+               qcom,msm_fastrpc_compute_cb5 {
+                       compatible = "qcom,msm-fastrpc-compute-cb";
+                       label = "cdsprpc-smd";
+                       iommus = <&turing_q6_smmu 3>;
+                       dma-coherent;
+               };
+               qcom,msm_fastrpc_compute_cb6 {
+                       compatible = "qcom,msm-fastrpc-compute-cb";
+                       label = "cdsprpc-smd";
+                       iommus = <&turing_q6_smmu 4>;
+                       dma-coherent;
+               };
+               qcom,msm_fastrpc_compute_cb7 {
+                       compatible = "qcom,msm-fastrpc-compute-cb";
+                       label = "cdsprpc-smd";
+                       iommus = <&turing_q6_smmu 5>;
+                       dma-coherent;
+               };
+
+               qcom,msm_fastrpc_compute_cb8 {
+                       compatible = "qcom,msm-fastrpc-compute-cb";
+                       label = "cdsprpc-smd";
+                       iommus = <&turing_q6_smmu 6>;
+                       dma-coherent;
+               };
+               qcom,msm_fastrpc_compute_cb9 {
+                       compatible = "qcom,msm-fastrpc-compute-cb";
+                       label = "cdsprpc-smd";
+                       iommus = <&turing_q6_smmu 7>;
+                       dma-coherent;
+               };
+               qcom,msm_fastrpc_compute_cb10 {
+                       compatible = "qcom,msm-fastrpc-compute-cb";
+                       label = "cdsprpc-smd";
+                       iommus = <&turing_q6_smmu 8>;
+                       dma-coherent;
+               };
+               qcom,msm_fastrpc_compute_cb11 {
+                       compatible = "qcom,msm-fastrpc-compute-cb";
+                       label = "cdsprpc-smd";
+                       iommus = <&turing_q6_smmu 9>;
+                       dma-coherent;
+               };
+               qcom,msm_fastrpc_compute_cb12 {
+                       compatible = "qcom,msm-fastrpc-compute-cb";
+                       label = "cdsprpc-smd";
+                       iommus = <&turing_q6_smmu 10>;
+                       dma-coherent;
+               };
+               qcom,msm_fastrpc_compute_cb13 {
+                       compatible = "qcom,msm-fastrpc-compute-cb";
+                       label = "cdsprpc-smd";
+                       iommus = <&turing_q6_smmu 11>;
+                       dma-coherent;
+               };
+       };
+
+
        dcc: dcc@10b3000 {
                compatible = "qcom,dcc";
                reg = <0x10b3000 0x1000>,