doc: marvell: add CM3 address space and PPv2.3 description

Patch adds CM3 address space and PPv2.3 description.

Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Acked-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/Documentation/devicetree/bindings/net/marvell-pp2.txt b/Documentation/devicetree/bindings/net/marvell-pp2.txt
index b783976..ce15c17 100644 (file)
--- a/Documentation/devicetree/bindings/net/marvell-pp2.txt
+++ b/Documentation/devicetree/bindings/net/marvell-pp2.txt
@@ -1,5 +1,6 @@
 * Marvell Armada 375 Ethernet Controller (PPv2.1)
   Marvell Armada 7K/8K Ethernet Controller (PPv2.2)
+  Marvell CN913X Ethernet Controller (PPv2.3)
 
 Required properties:
 
@@ -12,10 +13,11 @@ Required properties:
        - common controller registers
        - LMS registers
        - one register area per Ethernet port
-  For "marvell,armada-7k-pp2", must contain the following register
+  For "marvell,armada-7k-pp2" used by 7K/8K and CN913X, must contain the following register
   sets:
        - packet processor registers
        - networking interfaces registers
+       - CM3 address space used for TX Flow Control
 
 - clocks: pointers to the reference clocks for this device, consequently:
        - main controller clock (for both armada-375-pp2 and armada-7k-pp2)
@@ -81,7 +83,7 @@ Example for marvell,armada-7k-pp2:
 
 cpm_ethernet: ethernet@0 {
        compatible = "marvell,armada-7k-pp22";
-       reg = <0x0 0x100000>, <0x129000 0xb000>;
+       reg = <0x0 0x100000>, <0x129000 0xb000>, <0x220000 0x800>;
        clocks = <&cpm_syscon0 1 3>, <&cpm_syscon0 1 9>,
                 <&cpm_syscon0 1 5>, <&cpm_syscon0 1 6>, <&cpm_syscon0 1 18>;
        clock-names = "pp_clk", "gop_clk", "mg_clk", "mg_core_clk", "axi_clk";