OSDN Git Service

KVM: x86/pmu: Constrain the num of guest counters with kvm_pmu_cap
authorLike Xu <likexu@tencent.com>
Sat, 3 Jun 2023 01:10:55 +0000 (18:10 -0700)
committerSean Christopherson <seanjc@google.com>
Wed, 7 Jun 2023 00:31:44 +0000 (17:31 -0700)
Cap the number of general purpose counters enumerated on AMD to what KVM
actually supports, i.e. don't allow userspace to coerce KVM into thinking
there are more counters than actually exist, e.g. by enumerating
X86_FEATURE_PERFCTR_CORE in guest CPUID when its not supported.

Suggested-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Like Xu <likexu@tencent.com>
[sean: massage changelog]
Link: https://lore.kernel.org/r/20230603011058.1038821-10-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
arch/x86/kvm/svm/pmu.c

index e5c6906..c039580 100644 (file)
@@ -170,6 +170,9 @@ static void amd_pmu_refresh(struct kvm_vcpu *vcpu)
        else
                pmu->nr_arch_gp_counters = AMD64_NUM_COUNTERS;
 
+       pmu->nr_arch_gp_counters = min_t(unsigned int, pmu->nr_arch_gp_counters,
+                                        kvm_pmu_cap.num_counters_gp);
+
        pmu->counter_bitmask[KVM_PMC_GP] = ((u64)1 << 48) - 1;
        pmu->reserved_bits = 0xfffffff000280000ull;
        pmu->raw_event_mask = AMD64_RAW_EVENT_MASK;