DMA: fix AMBA PL08x compilation issue with 64bit DMA address type

When dma_addr_t is 64 bits long, compilation of the AMBA PL08x DMA
driver breaks due to a missing 64bit%8bit modulo operation.
Looking more closely the divisor in these operations can only be
1, 2 or 4, so the full featured '%' modulo operation is overkill and
can be replaced with simple bit masking.

Change from v1:
Replace open-coded function with existing IS_ALIGNED macro and use a
macro around that to avoid a line becoming too long.

Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>

diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c
index 06fe45c..fb3ce9e 100644 (file)
--- a/drivers/dma/amba-pl08x.c
+++ b/drivers/dma/amba-pl08x.c
@@ -133,6 +133,8 @@ struct pl08x_bus_data {
        u8 buswidth;
 };
 
+#define IS_BUS_ALIGNED(bus) IS_ALIGNED((bus)->addr, (bus)->buswidth)
+
 /**
  * struct pl08x_phy_chan - holder for the physical channels
  * @id: physical index to this channel
@@ -886,8 +888,8 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x,
                                return 0;
                        }
 
-                       if ((bd.srcbus.addr % bd.srcbus.buswidth) ||
-                                       (bd.dstbus.addr % bd.dstbus.buswidth)) {
+                       if (!IS_BUS_ALIGNED(&bd.srcbus) ||
+                               !IS_BUS_ALIGNED(&bd.dstbus)) {
                                dev_err(&pl08x->adev->dev,
                                        "%s src & dst address must be aligned to src"
                                        " & dst width if peripheral is flow controller",
@@ -908,9 +910,9 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x,
                 */
                if (bd.remainder < mbus->buswidth)
                        early_bytes = bd.remainder;
-               else if ((mbus->addr) % (mbus->buswidth)) {
-                       early_bytes = mbus->buswidth - (mbus->addr) %
-                               (mbus->buswidth);
+               else if (!IS_BUS_ALIGNED(mbus)) {
+                       early_bytes = mbus->buswidth -
+                               (mbus->addr & (mbus->buswidth - 1));
                        if ((bd.remainder - early_bytes) < mbus->buswidth)
                                early_bytes = bd.remainder;
                }
@@ -928,7 +930,7 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x,
                         * Master now aligned
                         * - if slave is not then we must set its width down
                         */
-                       if (sbus->addr % sbus->buswidth) {
+                       if (!IS_BUS_ALIGNED(sbus)) {
                                dev_dbg(&pl08x->adev->dev,
                                        "%s set down bus width to one byte\n",
                                        __func__);