maincpu = NULL;
#if defined(CAPABLE_DICTROM)
kanjiclass1 = NULL;
-#endif
+#endif
#if defined(_FM77AV40) || defined(_FM77AV40EX) || defined(_FM77AV40SX) || \
defined(_FM77_VARIANTS)
fm7_mainmem_extram = NULL;
} else {
use_page2_extram = ((config.dipswitch & FM7_DIPSW_EXTRAM_AV) != 0) ? true : false;
}
-#endif
+#endif
#ifdef HAS_MMR
mmr_extend = false;
mmr_segment = 0;
uint32_t clock = MAINCLOCK_SLOW;
if(mode == 1) { // SLOW
clock = MAINCLOCK_SLOW; // Temporally
-#if defined(HAS_MMR)
+#if defined(HAS_MMR)
if(!mmr_fast && !window_fast) {
if(refresh_fast) {
if(mmr_enabled || window_enabled) {
clock = (uint32_t)((double)clock * 1.089);
} else {
clock = (uint32_t)((double)clock * 1.086);
- }
+ }
}
}
-#endif
+#endif
} else {
#if defined(HAS_MMR)
# if defined(_FM77AV40) || defined(_FM77AV40EX) || defined(_FM77AV40SX)
clock = MAINCLOCK_FAST_MMR - ((100000000 / 1302) * 1); // Fast Refresh: 1wait
} else {
clock = MAINCLOCK_FAST_MMR - ((100000000 / 1302) * 3); // Slow Refresh: 3Wait(!)
- }
+ }
if(mmr_enabled || window_enabled) {
clock = (uint32_t)((double)clock * 0.87);
- }
+ }
} else {
clock = MAINCLOCK_FAST_MMR;
//if(!(mmr_enabled) && !(window_enabled)) clock = MAINCLOCK_NORMAL;
# endif
#else
clock = MAINCLOCK_NORMAL;
-#endif
+#endif
}
//mem_waitcount = 0;
uint32_t before_waitfactor = mem_waitfactor;
// Below is ugly hack cause of CPU#0 cannot modify clock.
if(before_waitfactor != mem_waitfactor) maincpu->write_signal(SIG_CPU_WAIT_FACTOR, mem_waitfactor, 0xffffffff);
}
-
+
void FM7_MAINMEM::iowait()
{
}
#else
_waitfactor = 2;
-#endif
+#endif
if(_waitfactor <= 0) return;
waitcount++;
if(waitcount >= _waitfactor) {
return FM7_MAINMEM_NULL;
}
}
-#endif
+#endif
return -1;
}
case FM7_MAINIO_BOOTRAM_RW:
value = (boot_ram_write) ? 0xffffffff : 0x00000000;
break;
-#endif
-#ifdef HAS_MMR
+#endif
+#ifdef HAS_MMR
case FM7_MAINIO_WINDOW_ENABLED:
value = (window_enabled) ? 0xffffffff : 0x00000000;
break;
case FM7_MAINIO_MEM_REFRESH_FAST:
value = (refresh_fast) ? 0xffffffff : 0x00000000;
break;
-#endif
+#endif
#if defined(_FM77AV_VARIANTS)
case FM7_MAINIO_INITROM_ENABLED:
value = (initiator_enabled) ? 0xffffffff: 0x00000000;
break;
-# if defined(_FM77AV40EX) || defined(_FM77AV40SX)
+# if defined(_FM77AV40EX) || defined(_FM77AV40SX)
case FM7_MAINIO_EXTROM:
value = (extrom_bank) ? 0xffffffff: 0x00000000;
break;
-# endif
+# endif
case FM7_MAINIO_EXTBANK:
value = extcard_bank & 0x3f;
value |= (dictram_enabled) ? 0x80 : 0;
case FM7_MAINIO_BOOTRAM_RW:
boot_ram_write = flag;
break;
-#endif
+#endif
#ifdef _FM77AV_VARIANTS
case FM7_MAINIO_INITROM_ENABLED:
initiator_enabled = flag;
dictram_enabled = ((data & 0x80) != 0) ? true : false;
dictrom_enabled = ((data & 0x40) != 0) ? true : false;
break;
-# if defined(_FM77AV40EX) || defined(_FM77AV40SX)
+# if defined(_FM77AV40EX) || defined(_FM77AV40SX)
case FM7_MAINIO_EXTROM:
extrom_bank = flag;
break;
-# endif
-#endif
-#ifdef HAS_MMR
+# endif
+#endif
+#ifdef HAS_MMR
case FM7_MAINIO_WINDOW_ENABLED:
window_enabled = flag;
setclock(config.cpu_type);
refresh_fast = flag;
setclock(config.cpu_type);
break;
-#endif
+#endif
}
}
uint32_t FM7_MAINMEM::read_dma_data8(uint32_t addr)
{
-#if defined(HAS_MMR)
+#if defined(HAS_MMR)
uint32_t val;
val = this->read_data8_main(addr & 0xffff, true);
return val;
#else
return this->read_data8(addr & 0xffff);
-#endif
+#endif
}
uint32_t FM7_MAINMEM::read_dma_io8(uint32_t addr)
{
-#if defined(HAS_MMR)
+#if defined(HAS_MMR)
uint32_t val;
val = this->read_data8_main(addr & 0xffff, true);
return val;
#else
return this->read_data8(addr & 0xffff);
-#endif
+#endif
}
uint32_t FM7_MAINMEM::read_data8(uint32_t addr)
{
-#if defined(HAS_MMR)
+#if defined(HAS_MMR)
if(addr >= FM7_MAINIO_WINDOW_OFFSET) {
switch(addr) {
case FM7_MAINIO_WINDOW_OFFSET:
}
return 0xff;
}
-#endif
+#endif
return read_data8_main(addr, false);
}
write_data8_main(addr & 0xffff, data, true);
#else
write_data8(addr & 0xffff, data);
-#endif
+#endif
}
void FM7_MAINMEM::write_dma_io8(uint32_t addr, uint32_t data)
write_data8_main(addr & 0xffff, data, true);
#else
write_data8(addr & 0xffff, data);
-#endif
+#endif
}
void FM7_MAINMEM::write_data8(uint32_t addr, uint32_t data)
{
-#if defined(HAS_MMR)
+#if defined(HAS_MMR)
if(addr >= FM7_MAINIO_WINDOW_OFFSET) {
switch(addr) {
case FM7_MAINIO_WINDOW_OFFSET:
{
uint32_t hi, lo;
uint32_t val;
-
+
hi = read_data8(addr) & 0xff;
lo = read_data8(addr + 1) & 0xff;
-
+
val = hi * 256 + lo;
return val;
}
+uint32_t FM7_MAINMEM::read_data16w(uint32_t addr, int *wait)
+{
+ return read_data16(addr);
+}
+
uint32_t FM7_MAINMEM::read_data32(uint32_t addr)
{
uint32_t ah, a2, a3, al;
uint32_t val;
-
+
ah = read_data8(addr) & 0xff;
a2 = read_data8(addr + 1) & 0xff;
a3 = read_data8(addr + 2) & 0xff;
al = read_data8(addr + 3) & 0xff;
-
+
val = ah * (65536 * 256) + a2 * 65536 + a3 * 256 + al;
return val;
}
+uint32_t FM7_MAINMEM::read_data32w(uint32_t addr, int *wait)
+{
+ return read_data32(addr);
+}
+
+
void FM7_MAINMEM::write_data16(uint32_t addr, uint32_t data)
{
uint32_t d = data;
-
+
write_data8(addr + 1, d & 0xff);
d = d / 256;
write_data8(addr + 0, d & 0xff);
}
+void FM7_MAINMEM::write_data16w(uint32_t addr, uint32_t data, int *wait)
+{
+ write_data16(addr, data);
+}
+
void FM7_MAINMEM::write_data32(uint32_t addr, uint32_t data)
{
uint32_t d = data;
-
+
write_data8(addr + 3, d & 0xff);
d = d / 256;
write_data8(addr + 2, d & 0xff);
write_data8(addr + 0, d & 0xff);
}
+void FM7_MAINMEM::write_data32w(uint32_t addr, uint32_t data, int *wait)
+{
+ write_data32(addr, data);
+}
+
void FM7_MAINMEM::update_config()
{
if(!state_fio->StateCheckInt32(this_device_id)) {
return false;
}
-
+
state_fio->StateValue(ioaccess_wait);
state_fio->StateValue(waitfactor);
state_fio->StateValue(waitcount);
state_fio->StateValue(sub_halted);
-
+
state_fio->StateValue(diag_load_basicrom);
state_fio->StateValue(diag_load_bootrom_bas);
state_fio->StateValue(diag_load_bootrom_dos);
state_fio->StateArray(fm7_mainmem_bioswork, sizeof(fm7_mainmem_bioswork), 1);
state_fio->StateArray(fm7_mainmem_bootrom_vector, sizeof(fm7_mainmem_bootrom_vector), 1);
state_fio->StateArray(fm7_mainmem_reset_vector, sizeof(fm7_mainmem_reset_vector), 1);
-
+
#if defined(_FM77AV_VARIANTS) || defined(_FM77_VARIANTS)
state_fio->StateArray(fm7_bootram, sizeof(fm7_bootram), 1);
-#endif
+#endif
#if defined(_FM77_VARIANTS) || defined(_FM8)
for(int i = 0; i < 8; i++) state_fio->StateArray(fm7_bootroms[i], 0x200, 1);
#elif defined(_FM7) || defined(_FMNEW7)
for(int i = 0; i < 4; i++) state_fio->StateArray(fm7_bootroms[i], 0x200, 1);
-#endif
+#endif
#if defined(_FM8)
state_fio->StateValue(diag_load_sm11_14);
state_fio->StateValue(diag_load_tl11_11);
# if defined(_FMNEW7)
state_fio->StateValue(diag_load_tl11_12);
-# endif
+# endif
#elif defined(_FM77AV_VARIANTS)
state_fio->StateValue(dictrom_connected);
state_fio->StateValue(use_page2_extram);
-
+
state_fio->StateValue(diag_load_initrom);
state_fio->StateValue(diag_load_dictrom);
state_fio->StateValue(diag_load_learndata);
state_fio->StateArray(fm7_mainmem_initrom, sizeof(fm7_mainmem_initrom), 1);
state_fio->StateArray(fm77av_hidden_bootmmr, sizeof(fm77av_hidden_bootmmr), 1);
-
+
state_fio->StateArray(fm7_mainmem_mmrbank_0, sizeof(fm7_mainmem_mmrbank_0), 1);
state_fio->StateArray(fm7_mainmem_mmrbank_2, sizeof(fm7_mainmem_mmrbank_2), 1);
-
+
# if defined(_FM77AV40EX) || defined(_FM77AV40SX)
state_fio->StateValue(diag_load_extrarom);
state_fio->StateArray(fm7_mainmem_extrarom, sizeof(fm7_mainmem_extrarom), 1);
# endif
# endif
#endif
-
+
{ // V2;
state_fio->StateValue(is_basicrom);
state_fio->StateValue(clockmode);
#endif
#if defined(_FM77AV_VARIANTS) || defined(_FM77_VARIANTS)
state_fio->StateValue(boot_ram_write);
-#endif
+#endif
#if defined(HAS_MMR)
state_fio->StateValue(window_enabled);
state_fio->StateValue(mmr_enabled);
state_fio->StateValue(mmr_fast);
state_fio->StateValue(mmr_extend);
-
+
state_fio->StateValue(window_offset);
state_fio->StateValue(window_fast);
state_fio->StateValue(refresh_fast);
#if defined(HAS_MMR)
# if defined(_FM77_VARIANTS)
if(extram_pages > 3) extram_pages = 3;
-# elif defined(_FM77AV40) || defined(_FM77AV40EX) || defined(_FM77AV40SX)
+# elif defined(_FM77AV40) || defined(_FM77AV40EX) || defined(_FM77AV40SX)
if(extram_pages > 12) extram_pages = 12;
# endif
#endif
//extram_size = extram_pages * 0x10000;
init_data_table();
update_all_mmr_jumptable();
- }
+ }
return true;
}
uint8_t *write_data;
void (__FASTCALL FM7_MAINMEM::*write_func)(uint32_t, uint32_t, bool);
} data_func_table_t;
-
+
data_func_table_t data_table[ADDRESS_SPACE / 0x80];
//data_func_table_t data_table[0x100000 / 0x80];
#if defined(HAS_MMR)
-# if defined(_FM77AV40) || defined(_FM77AV40EX) || defined(_FM77AV40SX)
+# if defined(_FM77AV40) || defined(_FM77AV40EX) || defined(_FM77AV40SX)
data_func_table_t mmr_update_table_ext[(0x80 * 0x1000) / 0x80];
uint32_t mmr_baseaddr_table_ext[(0x80 * 0x1000) / 0x80];
# endif
int waitfactor;
int waitcount;
int cpu_clocks;
-
+
bool sub_halted;
// V2
#ifdef HAS_MMR
uint8_t fm7_mainmem_bioswork[0x80];
#if !defined(_FM77AV)
uint8_t fm7_bootroms[8][0x200];
-#endif
+#endif
uint8_t fm7_mainmem_bootrom_vector[0x1e]; // Without
uint8_t fm7_mainmem_reset_vector[2]; // Without
#if defined(_FM77AV_VARIANTS) || defined(_FM77_VARIANTS)
bool dictrom_connected;
bool dictrom_enabled;
bool dictram_enabled;
-
+
bool use_page2_extram;
uint8_t fm7_mainmem_initrom[0x2000]; // $00000-$0ffff
uint8_t fm77av_hidden_bootmmr[0x200];
uint8_t fm7_mainmem_dictrom[0x40000]; // $00000-$3ffff, banked
uint8_t fm7_mainmem_learndata[0x2000];
# endif
-# if defined(_FM77AV40) || defined(_FM77AV40EX) || defined(_FM77AV40SX)
+# if defined(_FM77AV40) || defined(_FM77AV40EX) || defined(_FM77AV40SX)
bool diag_load_extrarom;
uint8_t fm7_mainmem_extrarom[0x10000]; // $20000-$2bfff, banked
int extram_pages;
#if defined(CAPABLE_DICTROM)
FM7::KANJIROM *kanjiclass1;
//KANJIROM *kanjiclass2;
-#endif
+#endif
MC6809 *maincpu;
FM7::FM7_MAINIO *mainio;
FM7::DISPLAY *display;
-
+
bool diag_load_basicrom;
bool diag_load_bootrom_bas;
bool diag_load_bootrom_dos;
uint32_t mem_waitcount;
int check_extrom(uint32_t raddr, uint32_t *realaddr);
-
+
int window_convert(uint32_t addr, uint32_t *realaddr);
uint32_t read_bios(const _TCHAR *name, uint8_t *ptr, uint32_t size);
uint32_t write_bios(const _TCHAR *name, uint8_t *ptr, uint32_t size);
void setclock(int mode);
-
+
uint8_t __FASTCALL read_shared_ram(uint32_t realaddr, bool dmamode);
void __FASTCALL write_shared_ram(uint32_t realaddr, uint32_t data, bool dmamode);
uint8_t __FASTCALL read_direct_access(uint32_t realaddr, bool dmamode);
uint8_t __FASTCALL read_page2(uint32_t addr, bool dmamode);
void __FASTCALL write_page2(uint32_t addr, uint32_t data, bool dmamode);
int __FASTCALL check_page2(uint32_t addr, uint32_t *realaddr, bool write_state, bool dmamode);
-
+
void init_data_table(void);
uint8_t __FASTCALL read_data(uint32_t addr, bool dmamode);
void __FASTCALL write_data(uint32_t addr, uint32_t data, bool dmamode);
void __FASTCALL write_dma_data8(uint32_t addr, uint32_t data);
void __FASTCALL write_dma_io8(uint32_t addr, uint32_t data);
void __FASTCALL write_data8_main(uint32_t addr, uint32_t data, bool dmamode);
-
+
virtual uint32_t __FASTCALL read_data16(uint32_t addr);
virtual void __FASTCALL write_data16(uint32_t addr, uint32_t data);
-
+ virtual uint32_t read_data16w(uint32_t addr, int *wait);
+ virtual void write_data16w(uint32_t addr, uint32_t data, int *wait);
+
virtual uint32_t __FASTCALL read_data32(uint32_t addr);
virtual void __FASTCALL write_data32(uint32_t addr, uint32_t data);
-
+ virtual uint32_t read_data32w(uint32_t addr, int *wait);
+ virtual void write_data32w(uint32_t addr, uint32_t data, int *wait);
+
void initialize(void);
void __FASTCALL iowait(void);
void __FASTCALL dram_refresh(void);
bool get_loadstat_bootrom_bas(void);
bool get_loadstat_bootrom_dos(void);
void update_config();
-
+
bool process_state(FILEIO *state_fio, bool loading);
void set_context_display(DEVICE *p){
void set_context_kanjirom_class1(DEVICE *p){
kanjiclass1 = (FM7::KANJIROM *)p;
}
-#endif
+#endif
void __FASTCALL write_signal(int sigid, uint32_t data, uint32_t mask);
uint32_t __FASTCALL read_signal(int sigid);
uint32_t __FASTCALL read_io8(uint32_t addr);