[X86] Add tests for missed opportunities to fold a 128-bit vector load into vfpclasss...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318018 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/X86/avx512dq-intrinsics.ll b/test/CodeGen/X86/avx512dq-intrinsics.ll
index e4f8549..49f439f 100644 (file)
--- a/test/CodeGen/X86/avx512dq-intrinsics.ll
+++ b/test/CodeGen/X86/avx512dq-intrinsics.ll
@@ -396,6 +396,19 @@ define i8 @test_int_x86_avx512_mask_fpclass_sd(<2 x double> %x0, i8 %x1) {
   ret i8 %res2
 }
 
+define i8 @test_int_x86_avx512_mask_fpclass_sd_load(<2 x double>* %x0ptr) {
+; CHECK-LABEL: test_int_x86_avx512_mask_fpclass_sd_load:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    vmovapd (%rdi), %xmm0
+; CHECK-NEXT:    vfpclasssd $4, %xmm0, %k0
+; CHECK-NEXT:    kmovw %k0, %eax
+; CHECK-NEXT:    ## kill: %AL<def> %AL<kill> %EAX<kill>
+; CHECK-NEXT:    retq
+  %x0 = load <2 x double>, <2 x double>* %x0ptr
+  %res = call i8 @llvm.x86.avx512.mask.fpclass.sd(<2 x double> %x0, i32 4, i8 -1)
+  ret i8 %res
+}
+
 declare i8 @llvm.x86.avx512.mask.fpclass.ss(<4 x float>, i32, i8)
 
 define i8 @test_int_x86_avx512_mask_fpclass_ss(<4 x float> %x0, i8 %x1) {
@@ -415,6 +428,19 @@ define i8 @test_int_x86_avx512_mask_fpclass_ss(<4 x float> %x0, i8 %x1) {
   ret i8 %res2
 }
 
+define i8 @test_int_x86_avx512_mask_fpclass_ss_load(<4 x float>* %x0ptr, i8 %x1) {
+; CHECK-LABEL: test_int_x86_avx512_mask_fpclass_ss_load:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    vmovaps (%rdi), %xmm0
+; CHECK-NEXT:    vfpclassss $4, %xmm0, %k0
+; CHECK-NEXT:    kmovw %k0, %eax
+; CHECK-NEXT:    ## kill: %AL<def> %AL<kill> %EAX<kill>
+; CHECK-NEXT:    retq
+  %x0 = load <4 x float>, <4 x float>* %x0ptr
+  %res = call i8 @llvm.x86.avx512.mask.fpclass.ss(<4 x float> %x0, i32 4, i8 -1)
+  ret i8 %res
+}
+
 declare i16 @llvm.x86.avx512.cvtd2mask.512(<16 x i32>)
 
 define i16@test_int_x86_avx512_cvtd2mask_512(<16 x i32> %x0) {