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x86/intel_rdt: Enable CMT and MBM on new Skylake stepping
authorTony Luck <tony.luck@intel.com>
Fri, 8 Jun 2018 16:07:32 +0000 (09:07 -0700)
committerThomas Gleixner <tglx@linutronix.de>
Sat, 9 Jun 2018 14:04:34 +0000 (16:04 +0200)
New stepping of Skylake has fixes for cache occupancy and memory
bandwidth monitoring.

Update the code to enable these by default on newer steppings.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: stable@vger.kernel.org # v4.14
Cc: Vikas Shivappa <vikas.shivappa@linux.intel.com>
Link: https://lkml.kernel.org/r/20180608160732.9842-1-tony.luck@intel.com
arch/x86/kernel/cpu/intel_rdt.c

index 589b948..316a887 100644 (file)
@@ -821,6 +821,8 @@ static __init void rdt_quirks(void)
        case INTEL_FAM6_SKYLAKE_X:
                if (boot_cpu_data.x86_stepping <= 4)
                        set_rdt_options("!cmt,!mbmtotal,!mbmlocal,!l3cat");
+               else
+                       set_rdt_options("!l3cat");
        }
 }