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* mach.scm (<derived-arch-data>): New member large-insn-word?.
authordevans <devans>
Mon, 23 Nov 2009 09:59:57 +0000 (09:59 +0000)
committerdevans <devans>
Mon, 23 Nov 2009 09:59:57 +0000 (09:59 +0000)
(/adata-set-derived!): Set it.
(adata-large-insn-word?): New function.
* sim-arch.scm (/gen-cpuall-includes): Don't #include cgen-engine.h
here.
* sim-cpu.scm (cgen-cpu.h): #include it here.
(/gen-cpu-defines): Define CGEN_INSN_WORD.
(/gen-no-scache-semantic-fn): Use CGEN_INSN_WORD instead of
CGEN_INSN_INT.
* sim-decode.scm (/gen-idesc-decls): Ditto.
(/gen-extract-case, /gen-decode-fn): Ditto.
* sim-model.scm (/gen-model-insn-fn): Ditto.
* sim.scm (gen-argbuf-type): Ditto.

cgen/ChangeLog
cgen/mach.scm
cgen/sim-arch.scm
cgen/sim-cpu.scm
cgen/sim-decode.scm
cgen/sim-model.scm
cgen/sim.scm

index 7dfd128..f3e5d84 100644 (file)
@@ -1,5 +1,19 @@
 2009-11-22  Doug Evans  <dje@sebabeach.org>
 
+       * mach.scm (<derived-arch-data>): New member large-insn-word?.
+       (/adata-set-derived!): Set it.
+       (adata-large-insn-word?): New function.
+       * sim-arch.scm (/gen-cpuall-includes): Don't #include cgen-engine.h
+       here.
+       * sim-cpu.scm (cgen-cpu.h): #include it here.
+       (/gen-cpu-defines): Define CGEN_INSN_WORD.
+       (/gen-no-scache-semantic-fn): Use CGEN_INSN_WORD instead of
+       CGEN_INSN_INT.
+       * sim-decode.scm (/gen-idesc-decls): Ditto.
+       (/gen-extract-case, /gen-decode-fn): Ditto.
+       * sim-model.scm (/gen-model-insn-fn): Ditto.
+       * sim.scm (gen-argbuf-type): Ditto.
+
        * rtl-c.scm (/use-gcc-stmt-expr?): New function.
        (s-sequence): Call it.
 
index 8750239..cd4dec5 100644 (file)
              '(
                ; whether all insns can be recorded in a host int
                integral-insn?
+
+               ; whether a large int is needed for insns
+               large-insn-word?
                )
              nil)
 )
 
-; Called after the .cpu file has been read in to prime derived value
-; computation.
-; Often this data isn't needed so we only computed it if we have to.
+;; Called after the .cpu file has been read in to prime derived value
+;; computation.
+;; Often this data isn't needed so we only computed it if we have to.
+;; The computation can require a single selected ISA; if we don't require
+;; the data don't unnecessarily flag an error.
 
 (define (/adata-set-derived! arch)
-  ; Don't compute this data unless we need to.
+  ;; Don't compute this data unless we need to.
   (arch-set-derived!
    arch
    (make <derived-arch-data>
-     ; integral-insn?
+     ;; integral-insn?
      (delay (isa-integral-insn? (current-isa)))
+     ;; insn-word-bitsize
+     (> (apply max (map isa-base-insn-bitsize (current-isa-list))) 32)
      ))
 )
 
 (define (adata-integral-insn? arch)
   (force (elm-xget (arch-derived arch) 'integral-insn?))
 )
+
+(define (adata-large-insn-word? arch)
+  (elm-xget (arch-derived arch) 'large-insn-word?)
+)
 \f
 ; Instruction analysis control.
 
index 3173585..3776f9f 100644 (file)
 (define (/gen-cpuall-includes)
   (string-list
    "/* Include files for each cpu family.  */\n\n"
-   (string-list-map (lambda (cpu)
-                     (let* ((cpu-name (gen-sym cpu))
-                            (CPU-NAME (string-upcase cpu-name)))
-                       (string-list "#ifdef WANT_CPU_" CPU-NAME "\n"
-                                    (/gen-cpu-header cpu "eng")
-                                    "#include \"cgen-engine.h\"\n"
-                                    (/gen-cpu-header cpu "cpu")
-                                    (/gen-cpu-header cpu "decode")
-                                    "#endif\n\n")))
-                   (current-cpu-list))
+   (string-list-map
+    (lambda (cpu)
+      (let* ((cpu-name (gen-sym cpu))
+            (CPU-NAME (string-upcase cpu-name)))
+       (string-list "#ifdef WANT_CPU_" CPU-NAME "\n"
+                    (/gen-cpu-header cpu "eng")
+                    (/gen-cpu-header cpu "cpu")
+                    (/gen-cpu-header cpu "decode")
+                    "#endif\n\n")))
+    (current-cpu-list))
    )
 )
 
index 3b85498..ea24e6e 100644 (file)
 
 /* Maximum number of instructions that can be executed in parallel.  */
 #define MAX_PARALLEL_INSNS " (number->string (state-parallel-insns))
-   "\n\n"
+   "\n\
+
+/* The size of an \"int\" needed to hold an instruction word.
+   This is usually 32 bits, but some architectures needs 64 bits.  */
+typedef "
+   (if (adata-large-insn-word? CURRENT-ARCH)
+       "CGEN_INSN_LGUINT"
+       "CGEN_INSN_INT")
+   " CGEN_INSN_WORD;\n\n"
 ;   (gen-enum-decl '@cpu@_virtual
 ;                "@cpu@ virtual insns"
 ;                "@ARCH@_INSN_" ; not @CPU@ to match CGEN_INSN_TYPE in opc.h
@@ -636,8 +644,8 @@ SEM_FN_NAME (@prefix@,init_idesc_table) (SIM_CPU *current_cpu)
      "static SEM_STATUS\n"
      "SEM_FN_NAME (@prefix@," (gen-sym insn) ")"
      (if (and parallel? (not (with-generic-write?)))
-        " (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec, CGEN_INSN_INT insn)\n"
-        " (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)\n")
+        " (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec, CGEN_INSN_WORD insn)\n"
+        " (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_WORD insn)\n")
      "{\n"
      (if (and parallel? (not (with-generic-write?)))
         (gen-define-parallel-operand-macro (insn-sfmt insn))
@@ -834,6 +842,12 @@ SEM_FN_NAME (@prefix@,init_idesc_table) (SIM_CPU *current_cpu)
 
 "
    /gen-cpu-defines
+   ;; After CGEN_INSN_WORD is defined we can include cgen-engine.h.
+   ;; We need to include it here (or thereabouts) because cgen-engine.h
+   ;; needs CGEN_INSN_WORD and parts of the remainder of this file need
+   ;; cgen-engine.h.
+   "/* cgen-engine.h needs CGEN_INSN_WORD that we just defined.  */\n"
+   "#include \"cgen-engine.h\"\n\n"
    /gen-hardware-types
    /gen-cpu-reg-access-decls
    /gen-model-decls
index 091b2f7..0c6d48c 100644 (file)
@@ -92,9 +92,9 @@ static const struct insn_sem @prefix@_insn_sem_invalid = {
 (define (/gen-idesc-decls)
   (string-append "\
 extern const IDESC *@prefix@_decode (SIM_CPU *, IADDR,
-                                  CGEN_INSN_INT,"
+                                  CGEN_INSN_WORD,"
   (if (adata-integral-insn? CURRENT-ARCH)
-      " CGEN_INSN_INT,\n"
+      " CGEN_INSN_WORD,\n"
       "\n")
   "\
                                   ARGBUF *);
@@ -435,7 +435,7 @@ void
    "    const IDESC *idesc = &" IDESC-TABLE-VAR "[itype];\n"
    (if (> (length (sfmt-iflds sfmt)) 0)
        (string-append
-       "    CGEN_INSN_INT insn = "
+       "    CGEN_INSN_WORD insn = "
        (if (adata-integral-insn? CURRENT-ARCH)
            "entire_insn;\n"
            "base_insn;\n"))
@@ -498,9 +498,9 @@ void
 
 const IDESC *
 @prefix@_decode (SIM_CPU *current_cpu, IADDR pc,
-              CGEN_INSN_INT base_insn,"
+              CGEN_INSN_WORD base_insn,"
        (if (adata-integral-insn? CURRENT-ARCH)
-          " CGEN_INSN_INT entire_insn,\n"
+          " CGEN_INSN_WORD entire_insn,\n"
           "\n")
        "\
               ARGBUF *abuf)
@@ -509,7 +509,7 @@ const IDESC *
   @PREFIX@_INSN_TYPE itype;
 
   {
-    CGEN_INSN_INT insn = base_insn;
+    CGEN_INSN_WORD insn = base_insn;
 \n"
 
        decode-code
index 2e21fad..dbc67da 100644 (file)
@@ -146,7 +146,7 @@ static const MACH_IMP_PROPERTIES @cpu@_imp_properties =
        ""
        (string-list
        "  IADDR UNUSED pc = GET_H_PC ();\n"
-       "  CGEN_INSN_INT insn = abuf->insn;\n"
+       "  CGEN_INSN_WORD insn = abuf->insn;\n"
        (gen-define-ifmt-ifields (insn-ifmt insn) "  " #f #t)
        (gen-sfmt-op-argbuf-defns (insn-sfmt insn))
        (gen-extract-ifmt-ifields (insn-ifmt insn) "  " #f #t)
index 82b6e0e..1db8d19 100644 (file)
@@ -1832,7 +1832,7 @@ struct argbuf {
   int written;
   union sem_fields fields;\n"
            "\
-  CGEN_INSN_INT insn;
+  CGEN_INSN_WORD insn;
   int written;\n")
        "")
    "};\n"