// simulator. -*- C++ -*-
// Copyright (C) 1999, 2000 Red Hat.
+// Portions Copyright (C) 2004 Sirius Satellite Radio Inc.
// This file is part of SID and is licensed under the GPL.
// See the file COPYING.SID for conditions for redistribution.
arm7f_cpu::arm7f_cpu ():
arm_engine (32768), // XXX: tune size
thumb_engine (32768), // XXX: tune size
- nfiq_pin (this, & arm7f_cpu::do_nfiq_pin),
- nirq_pin (this, & arm7f_cpu::do_nirq_pin),
initialized_p (false)
{
// ??? One might want to quibble over the case of these pins (nFIQ?).
// Add register access for debugger
this->create_gdb_register_attrs (26, "7;11;13;14;15;25", & this->hardware.h_pc);
+
+ // These need to be 'pulled' high if they are not connected.
+ nirq_pin.driven(1);
+ nfiq_pin.driven(1);
}
string
this->initialized_p = true;
this->triggerpoint_manager.check_and_dispatch ();
+
+ // These need to be 'pulled' high if they are not connected.
+ nirq_pin.driven(1);
+ nfiq_pin.driven(1);
}
return;
}
+ // Check for currently asserted interrupt pins. Interrupts are only checked for at each
+ // step size block of instructions.
+ if(!this->h_fbit_get() && !nfiq_pin.sense())
+ queue_eit (EIT_FIQ);
+
+ if(!this->h_ibit_get() && !nirq_pin.sense())
+ queue_eit (EIT_IRQ);
+
+ // If an eit is queued, process it now.
+ if (this->pending_eit != EIT_NONE)
+ this->process_eit (this->pending_eit);
+
if (this->engine_type == ENGINE_PBB)
{
if (this->h_tbit_get ())
{
assert (! this->h_tbit_get ());
- // If an eit is queued, process it now.
- if (this->pending_eit != EIT_NONE)
- this->process_eit (this->pending_eit);
-
while (true)
{
// Fetch/decode the instruction ------------------------------
{
assert (this->h_tbit_get ());
- // If an eit is queued, process it now.
- if (this->pending_eit != EIT_NONE)
- this->process_eit (this->pending_eit);
-
while (true)
{
// Fetch/decode the instruction ------------------------------
|| this->enable_step_trap_p)
return this->step_arm ();
- // If an eit is queued, process it now.
- if (this->pending_eit != EIT_NONE)
- this->process_eit (this->pending_eit);
-
try
{
// This function takes care of step_insn_count.
|| this->enable_step_trap_p)
return this->step_thumb ();
- // If an eit is queued, process it now.
- if (this->pending_eit != EIT_NONE)
- this->process_eit (this->pending_eit);
-
try
{
// This function takes care of step_insn_count.
\f
// EIT (exception, interrupt, and trap) pins.
-void
-arm7f_cpu::do_nfiq_pin (host_int_4 value)
-{
- // FIXME: Should be able to catch high-low transition but can't do
- // that with callback_pin.
- //if (nfiq_pin.sense () == value)
- // return;
- if (value)
- return;
-
- // nFIQ has been driven low.
-
- // Are FIQ interrupts disabled?
- if (this->h_fbit_get ())
- return;
-
- // Queue the interrupt.
- this->queue_eit (EIT_FIQ);
-}
-
-void
-arm7f_cpu::do_nirq_pin (host_int_4 value)
-{
- // FIXME: Should be able to catch high-low transition but can't do
- // that with callback_pin.
- //if (nirq_pin.sense () == value)
- // return;
- if (value)
- return;
-
- // nIRQ has been driven low.
-
- // Are IRQ interrupts disabled?
- if (this->h_ibit_get ())
- return;
-
- // Queue the interrupt.
- this->queue_eit (EIT_IRQ);
-}
-
\f
// Miscellaneous pins.
| |from memory via the insn-memory |
| |accessor, and its decoding traced if|
| |the trace-extract? attribute is set |
- | |to a true value. The decoded form |
- | |may be cached indefinitely |
- | |afterwards, although this cache is |
- | |flushed when the flush-icache pin is|
- | |driven. |
+ | |to a true value. To prevent unwanted|
+ | |cache side effects, the |
+ | |disassembler-memory accessor can be |
+ | |used and connected directly to main |
+ | |memory, bypassing any memory caches.|
+ | |The decoded form may be cached |
+ | |indefinitely afterwards, although |
+ | |this cache is flushed when the |
+ | |flush-icache pin is driven. |
| | |
| |The engine-type attribute specifies |
| |whether the "scache" ("semantic |
| |is used to represent standard |
| |output. Trace output files are not |
| |appended, but overwritten each time |
- | |they are opened. |
+ | |they are opened. The |
+ | |print-insn-summary! pin can be |
+ | |driven to print a summary of |
+ | |instruction and cycle counts, |
+ | |usually at the end of the |
+ | |simulation. The trace pin can be |
+ | |driven with any value which will be |
+ | |output as a character into the trace|
+ | |stream. |
|----------------+------------------------------------|
|exceptions/traps|When encountering exception/trap |
| |conditions such as memory access |
| |step! pin is next invoked. Note that|
| |this may not be the next instruction|
| |if the step-insn-count attribute is |
- | |greater than one. |
+ | |greater than one. Also note that |
+ | |these pins are level sensitive, so |
+ | |interrupts will occur repeatedly |
+ | |until the pin is driven non-zero. |
+ | |They are 'pulled' to one (high) at |
+ | |processor invocation and reset. |
|----------------+------------------------------------|
| register access|All 16 general purpose registers are|
| |accessible as attribute r0 through |
| |to the target program's address |
| |space, and is used by gdb to access |
| |target memory. |
+ | | |
+ | |The gdb-breakpoint-big and |
+ | |gdb-breakpoint-little attributes, if|
+ | |present, are used as memory images |
+ | |of software breakpoint instructions |
+ | |for the appropriate run-time |
+ | |endianness mode. |
+-----------------------------------------------------+
+-------------------------------------------------+
Component: hw-cpu-arm7t
- +-----------------------------------------------------------+
- | pins |
- |-----------------------------------------------------------|
- | name |direction| legalvalues | behaviors |
- |-------------+---------+------------------+----------------|
- |endian-set! |in |1 (big) / 2 |initialization |
- | | |(little) | |
- |-------------+---------+------------------+----------------|
- |start-pc-set!|in |any value |initialization |
- |-------------+---------+------------------+----------------|
- |reset! |in |0 or 1 |initialization |
- |-------------+---------+------------------+----------------|
- |trap |inout |enum values |exceptions/traps|
- |-------------+---------+------------------+----------------|
- |trap-code |out |various values |exceptions/traps|
- |-------------+---------+------------------+----------------|
- |step-cycles |out |1..step-insn-count|execution |
- |-------------+---------+------------------+----------------|
- |step! |in |any value |execution |
- |-------------+---------+------------------+----------------|
- |yield |in |any |execution |
- |-------------+---------+------------------+----------------|
- |flush-icache |in |any |execution |
- |-------------+---------+------------------+----------------|
- |nreset |in |0 or 1 |execution |
- |-------------+---------+------------------+----------------|
- |nm |out |0 or 1 |register access |
- |-------------+---------+------------------+----------------|
- |tbit |out |0 or 1 |register access |
- |-------------+---------+------------------+----------------|
- |nfiq |in |0 or 1 |hardware |
- | | | |interrupts |
- |-------------+---------+------------------+----------------|
- |nirq |in |0 or 1 |hardware |
- | | | |interrupts |
- +-----------------------------------------------------------+
+ +-----------------------------------------------------------------+
+ | pins |
+ |-----------------------------------------------------------------|
+ | name |direction| legalvalues | behaviors |
+ |-------------------+---------+------------------+----------------|
+ |endian-set! |in |1 (big) / 2 |initialization |
+ | | |(little) | |
+ |-------------------+---------+------------------+----------------|
+ |start-pc-set! |in |any value |initialization |
+ |-------------------+---------+------------------+----------------|
+ |reset! |in |0 or 1 |initialization |
+ |-------------------+---------+------------------+----------------|
+ |trap |inout |enum values |exceptions/traps|
+ |-------------------+---------+------------------+----------------|
+ |trap-code |out |various values |exceptions/traps|
+ |-------------------+---------+------------------+----------------|
+ |step-cycles |out |1..step-insn-count|execution |
+ |-------------------+---------+------------------+----------------|
+ |step! |in |any value |execution |
+ |-------------------+---------+------------------+----------------|
+ |yield |in |any |execution |
+ |-------------------+---------+------------------+----------------|
+ |flush-icache |in |any |execution |
+ |-------------------+---------+------------------+----------------|
+ |print-insn-summary!|in |any |tracing |
+ |-------------------+---------+------------------+----------------|
+ |trace |in |any |tracing |
+ |-------------------+---------+------------------+----------------|
+ |nreset |in |0 or 1 |execution |
+ |-------------------+---------+------------------+----------------|
+ |nm |out |0 or 1 |register access |
+ |-------------------+---------+------------------+----------------|
+ |tbit |out |0 or 1 |register access |
+ |-------------------+---------+------------------+----------------|
+ |nfiq |in |0 or 1 |hardware |
+ | | | |interrupts |
+ |-------------------+---------+------------------+----------------|
+ |nirq |in |0 or 1 |hardware |
+ | | | |interrupts |
+ +-----------------------------------------------------------------+
+-------------------------------------------------+
| buses |
| | | | access |
+-------------------------------------------------+
- +---------------------------------------------------------------------------+
- | attributes |
- |---------------------------------------------------------------------------|
- | name |category | legal values |default| behaviors ||
- | | | | value | ||
- |-----------------+---------+----------------------+-------+---------------||
- |endian |register |'1'/'big'/'2'/'little'|big |initialization,||
- | | | | |register access||
- |-----------------+---------+----------------------+-------+---------------||
- |trace-extract? |setting |boolean |false |tracing ||
- |-----------------+---------+----------------------+-------+---------------||
- |trace-filename |setting |string |- |tracing ||
- |-----------------+---------+----------------------+-------+---------------||
- |trace-result? |setting |boolean |false |tracing ||
- |-----------------+---------+----------------------+-------+---------------||
- |engine-type |setting |scache or pbb |pbb |execution ||
- |-----------------+---------+----------------------+-------+---------------||
- |insn-count |watchable|number |- |execution ||
- | |register | | | ||
- |-----------------+---------+----------------------+-------+---------------||
- |step-insn-count |setting |number |1 |execution ||
- |-----------------+---------+----------------------+-------+---------------||
- |enable-step-trap?|setting |boolean |false |execution ||
- |-----------------+---------+----------------------+-------+---------------||
- |rN |watchable|number |- |register access||
- | |register | | | ||
- |-----------------+---------+----------------------+-------+---------------||
- |pc |watchable|number |- |register access||
- | |register | | | ||
- |-----------------+---------+----------------------+-------+---------------||
- |gdb-register-N |debugger |byte array |- |register access||
- |-----------------+---------+----------------------+-------+---------------||
- |gdb-num-registers|debugger |number |- |register access||
- |-----------------+---------+----------------------+-------+---------------||
- |gdb-exp-registers|debugger |number list |- |register access||
- |-----------------+---------+----------------------+-------+---------------||
- |state-snapshot |- |opaque string |- |state ||
- | | | | |save/restore ||
- |-----------------+---------+----------------------+-------+---------------||
- |step-cycles |watchable|number |- |execution ||
- | |pin | | | ||
- |-----------------+---------+----------------------+-------+---------------||
- |trap |watchable|number |- |execution/traps||
- | |pin | | | ||
- |-----------------+---------+----------------------+-------+---------------||
- |trap-code |watchable|number |- |execution/traps||
- | |pin | | | ||
- |-----------------+---------+----------------------+-------+---------------||
- |cpsr |watchable|number |- |register access||
- | |register | | | ||
- |-----------------+---------+----------------------+-------+---------------||
- |cpsr-flags |register |string |- |register access||
- |-----------------+---------+----------------------+-------+---------------||
- |nm |watchable|number |- |register access||
- | |pin | | | ||
- |-----------------+---------+----------------------+-------+---------------||
- |tbit |watchable|number |- |register access||
- | |pin | | | ||
- |-----------------+---------+----------------------+-------+---------------||
- |nfiq |watchable|number |- |hardware ||
- | |pin | | |interrupts ||
- |-----------------+---------+----------------------+-------+---------------||
- |nirq |watchable|number |- |hardware ||
- | |pin | | |interrupts ||
- |-----------------+---------+----------------------+-------+---------------||
- |rN_fiq |watchable|number |- |register access||
- | |register | | | ||
- |-----------------+---------+----------------------+-------+---------------||
- |rN_svc |watchable|number |- |register access||
- | |register | | | ||
- |-----------------+---------+----------------------+-------+---------------||
- |rN_abt |watchable|number |- |register access||
- | |register | | | ||
- |-----------------+---------+----------------------+-------+---------------||
- |rN_irq |watchable|number |- |register access||
- | |register | | | ||
- |-----------------+---------+----------------------+-------+---------------||
- |rN_und |watchable|number |- |register access||
- | |register | | | ||
- |-----------------+---------+----------------------+-------+---------------||
- |spsr_fiq |watchable|number |- |register access||
- | |register | | | ||
- |-----------------+---------+----------------------+-------+---------------||
- |spsr_svc |watchable|number |- |register access||
- | |register | | | ||
- |-----------------+---------+----------------------+-------+---------------||
- |spsr_abt |watchable|number |- |register access||
- | |register | | | ||
- |-----------------+---------+----------------------+-------+---------------||
- |spsr_irq |watchable|number |- |register access||
- | |register | | | ||
- |-----------------+---------+----------------------+-------+---------------||
- |spsr_und |watchable|number |- |register access||
- | |register | | | ||
- +---------------------------------------------------------------------------+
++-------------------------------------------------------------------------------+
+| attributes |
+|-------------------------------------------------------------------------------|
+| name |category | legal values |default| behaviors ||
+| | | | value | ||
+|---------------------+---------+----------------------+-------+---------------||
+|endian |register |'1'/'big'/'2'/'little'|big |initialization,||
+| | | | |register access||
+|---------------------+---------+----------------------+-------+---------------||
+|trace-extract? |setting |boolean |false |tracing ||
+|---------------------+---------+----------------------+-------+---------------||
+|trace-filename |setting |string |- |tracing ||
+|---------------------+---------+----------------------+-------+---------------||
+|trace-result? |setting |boolean |false |tracing ||
+|---------------------+---------+----------------------+-------+---------------||
+|trace-counter? |setting |boolean |false |tracing ||
+|---------------------+---------+----------------------+-------+---------------||
+|final-insn-count? |setting |boolean |false |tracing ||
+|---------------------+---------+----------------------+-------+---------------||
+|engine-type |setting |scache or pbb |pbb |execution ||
+|---------------------+---------+----------------------+-------+---------------||
+|insn-count |watchable|number |- |execution ||
+| |register | | | ||
+|---------------------+---------+----------------------+-------+---------------||
+|step-insn-count |setting |number |1 |execution ||
+|---------------------+---------+----------------------+-------+---------------||
+|enable-step-trap? |setting |boolean |false |execution ||
+|---------------------+---------+----------------------+-------+---------------||
+|rN |watchable|number |- |register access||
+| |register | | | ||
+|---------------------+---------+----------------------+-------+---------------||
+|pc |watchable|number |- |register access||
+| |register | | | ||
+|---------------------+---------+----------------------+-------+---------------||
+|gdb-register-N |debugger |byte array |- |register access||
+|---------------------+---------+----------------------+-------+---------------||
+|gdb-num-registers |debugger |number |- |register access||
+|---------------------+---------+----------------------+-------+---------------||
+|gdb-exp-registers |debugger |number list |- |register access||
+|---------------------+---------+----------------------+-------+---------------||
+|gdb-breakpoint-big |debugger |byte array |- |register access||
+|---------------------+---------+----------------------+-------+---------------||
+|gdb-breakpoint-little|debugger |byte array |- |register access||
+|---------------------+---------+----------------------+-------+---------------||
+|state-snapshot |- |opaque string |- |state ||
+| | | | |save/restore ||
+|---------------------+---------+----------------------+-------+---------------||
+|step-cycles |watchable|number |- |execution ||
+| |pin | | | ||
+|---------------------+---------+----------------------+-------+---------------||
+|trap |watchable|number |- |execution/traps||
+| |pin | | | ||
+|---------------------+---------+----------------------+-------+---------------||
+|trap-code |watchable|number |- |execution/traps||
+| |pin | | | ||
+|---------------------+---------+----------------------+-------+---------------||
+|cpsr |watchable|number |- |register access||
+| |register | | | ||
+|---------------------+---------+----------------------+-------+---------------||
+|cpsr-flags |register |string |- |register access||
+|---------------------+---------+----------------------+-------+---------------||
+|nm |watchable|number |- |register access||
+| |pin | | | ||
+|---------------------+---------+----------------------+-------+---------------||
+|tbit |watchable|number |- |register access||
+| |pin | | | ||
+|---------------------+---------+----------------------+-------+---------------||
+|nfiq |watchable|number |- |hardware ||
+| |pin | | |interrupts ||
+|---------------------+---------+----------------------+-------+---------------||
+|nirq |watchable|number |- |hardware ||
+| |pin | | |interrupts ||
+|---------------------+---------+----------------------+-------+---------------||
+|rN_fiq |watchable|number |- |register access||
+| |register | | | ||
+|---------------------+---------+----------------------+-------+---------------||
+|rN_svc |watchable|number |- |register access||
+| |register | | | ||
+|---------------------+---------+----------------------+-------+---------------||
+|rN_abt |watchable|number |- |register access||
+| |register | | | ||
+|---------------------+---------+----------------------+-------+---------------||
+|rN_irq |watchable|number |- |register access||
+| |register | | | ||
+|---------------------+---------+----------------------+-------+---------------||
+|rN_und |watchable|number |- |register access||
+| |register | | | ||
+|---------------------+---------+----------------------+-------+---------------||
+|spsr_fiq |watchable|number |- |register access||
+| |register | | | ||
+|---------------------+---------+----------------------+-------+---------------||
+|spsr_svc |watchable|number |- |register access||
+| |register | | | ||
+|---------------------+---------+----------------------+-------+---------------||
+|spsr_abt |watchable|number |- |register access||
+| |register | | | ||
+|---------------------+---------+----------------------+-------+---------------||
+|spsr_irq |watchable|number |- |register access||
+| |register | | | ||
+|---------------------+---------+----------------------+-------+---------------||
+|spsr_und |watchable|number |- |register access||
+| |register | | | ||
++-------------------------------------------------------------------------------+
+-------------------------------------------------+
| accessors |
|-------------------------------------------------|
- | name | accesses | behaviors |
- |-------------+-----------------------+-----------|
- | data-memory | any | execution |
- |-------------+-----------------------+-----------|
- | insn-memory | typically 4-byte | execution |
- | | accesses | |
+ | name | accesses | behaviors |
+ |---------------------+---------------+-----------|
+ | data-memory | any | execution |
+ |---------------------+---------------+-----------|
+ | | typically | |
+ | insn-memory | 4-byte | execution |
+ | | accesses | |
+ |---------------------+---------------+-----------|
+ | disassembler-memory | any | execution |
+-------------------------------------------------+
----------------------------------------------------------------------