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USB: dwc3: msm: Add support for vote/devote aggre2_snoc_axi_clk
authorVijayavardhan Vennapusa <vvreddy@codeaurora.org>
Wed, 30 Nov 2016 07:40:01 +0000 (13:10 +0530)
committerVijayavardhan Vennapusa <vvreddy@codeaurora.org>
Fri, 2 Dec 2016 11:18:12 +0000 (16:48 +0530)
It is required to put/get vote for aggre2_snoc_axi_clk before turning
ON USB core clock for read/write transactions to be successful over
NOC from USB->DDR. Hence add support for voting aggre2_snoc_axi_clk
before enabling USB core clock as part of exiting low power mode.

Change-Id: Icb17d65fbbe49d93971905948c3dc9ab17de152a
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
Documentation/devicetree/bindings/usb/msm-ssusb.txt
drivers/usb/dwc3/dwc3-msm.c

index f4d1090..1c870ac 100644 (file)
@@ -39,7 +39,7 @@ Optional properties :
  - clocks: a list of phandles to the controller clocks. Use as per
    Documentation/devicetree/bindings/clock/clock-bindings.txt
  - clock-names: Names of the clocks in 1-1 correspondence with the "clocks"
-   property. Optional clocks are "bus_aggr_clk" and "cfg_ahb_clk".
+   property. Optional clocks are "bus_aggr_clk", "noc_aggr_clk" and "cfg_ahb_clk".
 - qcom,charging-disabled: If present then battery charging using USB
   is disabled.
 - vbus_dwc3-supply: phandle to the 5V VBUS supply regulator used for host mode.
@@ -95,12 +95,13 @@ Example MSM USB3.0 controller device node :
                clocks = <&clock_gcc clk_gcc_usb30_master_clk>,
                        <&clock_gcc clk_gcc_cfg_noc_usb3_axi_clk>,
                        <&clock_gcc clk_gcc_aggre1_usb3_axi_clk>,
+                       <&clock_rpmcc RPM_AGGR2_NOC_CLK>,
                        <&clock_gcc clk_gcc_usb30_mock_utmi_clk>,
                        <&clock_gcc clk_gcc_usb30_sleep_clk>,
                        <&clock_gcc clk_gcc_usb_phy_cfg_ahb2phy_clk>,
                        <&clock_gcc clk_cxo_dwc3_clk>;
 
-               clock-names = "core_clk", "iface_clk", "bus_aggr_clk",
+               clock-names = "core_clk", "iface_clk", "bus_aggr_clk", "noc_aggr_clk",
                                "utmi_clk", "sleep_clk", "cfg_ahb_clk", "xo";
 
                resets = <&clock_gcc GCC_USB_30_BCR>;
index a21f673..bb6afb6 100644 (file)
@@ -159,6 +159,7 @@ struct dwc3_msm {
        unsigned int            utmi_clk_rate;
        struct clk              *utmi_clk_src;
        struct clk              *bus_aggr_clk;
+       struct clk              *noc_aggr_clk;
        struct clk              *cfg_ahb_clk;
        struct reset_control    *core_reset;
        struct regulator        *dwc3_gdsc;
@@ -1956,6 +1957,8 @@ static int dwc3_msm_suspend(struct dwc3_msm *mdwc)
 
        clk_set_rate(mdwc->core_clk, 19200000);
        clk_disable_unprepare(mdwc->core_clk);
+       if (mdwc->noc_aggr_clk)
+               clk_disable_unprepare(mdwc->noc_aggr_clk);
        /*
         * Disable iface_clk only after core_clk as core_clk has FSM
         * depedency on iface_clk. Hence iface_clk should be turned off
@@ -2070,6 +2073,8 @@ static int dwc3_msm_resume(struct dwc3_msm *mdwc)
         * Turned ON iface_clk before core_clk due to FSM depedency.
         */
        clk_prepare_enable(mdwc->iface_clk);
+       if (mdwc->noc_aggr_clk)
+               clk_prepare_enable(mdwc->noc_aggr_clk);
        clk_set_rate(mdwc->core_clk, mdwc->core_clk_rate);
        clk_prepare_enable(mdwc->core_clk);
 
@@ -2416,6 +2421,10 @@ static int dwc3_msm_get_clk_gdsc(struct dwc3_msm *mdwc)
        if (IS_ERR(mdwc->bus_aggr_clk))
                mdwc->bus_aggr_clk = NULL;
 
+       mdwc->noc_aggr_clk = devm_clk_get(mdwc->dev, "noc_aggr_clk");
+       if (IS_ERR(mdwc->noc_aggr_clk))
+               mdwc->noc_aggr_clk = NULL;
+
        if (of_property_match_string(mdwc->dev->of_node,
                                "clock-names", "cfg_ahb_clk") >= 0) {
                mdwc->cfg_ahb_clk = devm_clk_get(mdwc->dev, "cfg_ahb_clk");
@@ -2965,6 +2974,8 @@ static int dwc3_msm_remove(struct platform_device *pdev)
        if (ret_pm < 0) {
                dev_err(mdwc->dev,
                        "pm_runtime_get_sync failed with %d\n", ret_pm);
+               if (mdwc->noc_aggr_clk)
+                       clk_prepare_enable(mdwc->noc_aggr_clk);
                clk_prepare_enable(mdwc->utmi_clk);
                clk_prepare_enable(mdwc->core_clk);
                clk_prepare_enable(mdwc->iface_clk);