arm64: cpufeature: Factor out checking of AArch32 features

update_cpu_features() is pretty large, so split out the checking of the
AArch32 features into a separate function and call it after checking the
AArch64 features.

Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20200421142922.18950-6-will@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 7dfcdd9..6892b24 100644 (file)
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -715,6 +715,65 @@ static int check_update_ftr_reg(u32 sys_id, int cpu, u64 val, u64 boot)
        return 1;
 }
 
+static int update_32bit_cpu_features(int cpu, struct cpuinfo_arm64 *info,
+                                    struct cpuinfo_arm64 *boot)
+{
+       int taint = 0;
+       u64 pfr0 = read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1);
+
+       /*
+        * If we don't have AArch32 at all then skip the checks entirely
+        * as the register values may be UNKNOWN and we're not going to be
+        * using them for anything.
+        */
+       if (!id_aa64pfr0_32bit_el0(pfr0))
+               return taint;
+
+       taint |= check_update_ftr_reg(SYS_ID_DFR0_EL1, cpu,
+                                     info->reg_id_dfr0, boot->reg_id_dfr0);
+       taint |= check_update_ftr_reg(SYS_ID_ISAR0_EL1, cpu,
+                                     info->reg_id_isar0, boot->reg_id_isar0);
+       taint |= check_update_ftr_reg(SYS_ID_ISAR1_EL1, cpu,
+                                     info->reg_id_isar1, boot->reg_id_isar1);
+       taint |= check_update_ftr_reg(SYS_ID_ISAR2_EL1, cpu,
+                                     info->reg_id_isar2, boot->reg_id_isar2);
+       taint |= check_update_ftr_reg(SYS_ID_ISAR3_EL1, cpu,
+                                     info->reg_id_isar3, boot->reg_id_isar3);
+       taint |= check_update_ftr_reg(SYS_ID_ISAR4_EL1, cpu,
+                                     info->reg_id_isar4, boot->reg_id_isar4);
+       taint |= check_update_ftr_reg(SYS_ID_ISAR5_EL1, cpu,
+                                     info->reg_id_isar5, boot->reg_id_isar5);
+       taint |= check_update_ftr_reg(SYS_ID_ISAR6_EL1, cpu,
+                                     info->reg_id_isar6, boot->reg_id_isar6);
+
+       /*
+        * Regardless of the value of the AuxReg field, the AIFSR, ADFSR, and
+        * ACTLR formats could differ across CPUs and therefore would have to
+        * be trapped for virtualization anyway.
+        */
+       taint |= check_update_ftr_reg(SYS_ID_MMFR0_EL1, cpu,
+                                     info->reg_id_mmfr0, boot->reg_id_mmfr0);
+       taint |= check_update_ftr_reg(SYS_ID_MMFR1_EL1, cpu,
+                                     info->reg_id_mmfr1, boot->reg_id_mmfr1);
+       taint |= check_update_ftr_reg(SYS_ID_MMFR2_EL1, cpu,
+                                     info->reg_id_mmfr2, boot->reg_id_mmfr2);
+       taint |= check_update_ftr_reg(SYS_ID_MMFR3_EL1, cpu,
+                                     info->reg_id_mmfr3, boot->reg_id_mmfr3);
+       taint |= check_update_ftr_reg(SYS_ID_PFR0_EL1, cpu,
+                                     info->reg_id_pfr0, boot->reg_id_pfr0);
+       taint |= check_update_ftr_reg(SYS_ID_PFR1_EL1, cpu,
+                                     info->reg_id_pfr1, boot->reg_id_pfr1);
+       taint |= check_update_ftr_reg(SYS_MVFR0_EL1, cpu,
+                                     info->reg_mvfr0, boot->reg_mvfr0);
+       taint |= check_update_ftr_reg(SYS_MVFR1_EL1, cpu,
+                                     info->reg_mvfr1, boot->reg_mvfr1);
+       taint |= check_update_ftr_reg(SYS_MVFR2_EL1, cpu,
+                                     info->reg_mvfr2, boot->reg_mvfr2);
+
+       return taint;
+}
+
+
 /*
  * Update system wide CPU feature registers with the values from a
  * non-boot CPU. Also performs SANITY checks to make sure that there
@@ -788,53 +847,6 @@ void update_cpu_features(int cpu,
        taint |= check_update_ftr_reg(SYS_ID_AA64ZFR0_EL1, cpu,
                                      info->reg_id_aa64zfr0, boot->reg_id_aa64zfr0);
 
-       /*
-        * If we have AArch32, we care about 32-bit features for compat.
-        * If the system doesn't support AArch32, don't update them.
-        */
-       if (id_aa64pfr0_32bit_el0(read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1))) {
-               taint |= check_update_ftr_reg(SYS_ID_DFR0_EL1, cpu,
-                                       info->reg_id_dfr0, boot->reg_id_dfr0);
-               taint |= check_update_ftr_reg(SYS_ID_ISAR0_EL1, cpu,
-                                       info->reg_id_isar0, boot->reg_id_isar0);
-               taint |= check_update_ftr_reg(SYS_ID_ISAR1_EL1, cpu,
-                                       info->reg_id_isar1, boot->reg_id_isar1);
-               taint |= check_update_ftr_reg(SYS_ID_ISAR2_EL1, cpu,
-                                       info->reg_id_isar2, boot->reg_id_isar2);
-               taint |= check_update_ftr_reg(SYS_ID_ISAR3_EL1, cpu,
-                                       info->reg_id_isar3, boot->reg_id_isar3);
-               taint |= check_update_ftr_reg(SYS_ID_ISAR4_EL1, cpu,
-                                       info->reg_id_isar4, boot->reg_id_isar4);
-               taint |= check_update_ftr_reg(SYS_ID_ISAR5_EL1, cpu,
-                                       info->reg_id_isar5, boot->reg_id_isar5);
-               taint |= check_update_ftr_reg(SYS_ID_ISAR6_EL1, cpu,
-                                       info->reg_id_isar6, boot->reg_id_isar6);
-
-               /*
-                * Regardless of the value of the AuxReg field, the AIFSR, ADFSR, and
-                * ACTLR formats could differ across CPUs and therefore would have to
-                * be trapped for virtualization anyway.
-                */
-               taint |= check_update_ftr_reg(SYS_ID_MMFR0_EL1, cpu,
-                                       info->reg_id_mmfr0, boot->reg_id_mmfr0);
-               taint |= check_update_ftr_reg(SYS_ID_MMFR1_EL1, cpu,
-                                       info->reg_id_mmfr1, boot->reg_id_mmfr1);
-               taint |= check_update_ftr_reg(SYS_ID_MMFR2_EL1, cpu,
-                                       info->reg_id_mmfr2, boot->reg_id_mmfr2);
-               taint |= check_update_ftr_reg(SYS_ID_MMFR3_EL1, cpu,
-                                       info->reg_id_mmfr3, boot->reg_id_mmfr3);
-               taint |= check_update_ftr_reg(SYS_ID_PFR0_EL1, cpu,
-                                       info->reg_id_pfr0, boot->reg_id_pfr0);
-               taint |= check_update_ftr_reg(SYS_ID_PFR1_EL1, cpu,
-                                       info->reg_id_pfr1, boot->reg_id_pfr1);
-               taint |= check_update_ftr_reg(SYS_MVFR0_EL1, cpu,
-                                       info->reg_mvfr0, boot->reg_mvfr0);
-               taint |= check_update_ftr_reg(SYS_MVFR1_EL1, cpu,
-                                       info->reg_mvfr1, boot->reg_mvfr1);
-               taint |= check_update_ftr_reg(SYS_MVFR2_EL1, cpu,
-                                       info->reg_mvfr2, boot->reg_mvfr2);
-       }
-
        if (id_aa64pfr0_sve(info->reg_id_aa64pfr0)) {
                taint |= check_update_ftr_reg(SYS_ZCR_EL1, cpu,
                                        info->reg_zcr, boot->reg_zcr);
@@ -846,6 +858,12 @@ void update_cpu_features(int cpu,
        }
 
        /*
+        * This relies on a sanitised view of the AArch64 ID registers
+        * (e.g. SYS_ID_AA64PFR0_EL1), so we call it last.
+        */
+       taint |= update_32bit_cpu_features(cpu, info, boot);
+
+       /*
         * Mismatched CPU features are a recipe for disaster. Don't even
         * pretend to support them.
         */