staging: mt7621-pci-phy: update bindings documentation

Device tree has been simplified to use phy-cells instead of
using child nodes. Update documentation accordly.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Reviewed-by: NeilBrown <neil@brown.name>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/mt7621-pci-phy/mediatek,mt7621-pci-phy.txt b/drivers/staging/mt7621-pci-phy/mediatek,mt7621-pci-phy.txt
index 33a8a69..a369d71 100644 (file)
--- a/drivers/staging/mt7621-pci-phy/mediatek,mt7621-pci-phy.txt
+++ b/drivers/staging/mt7621-pci-phy/mediatek,mt7621-pci-phy.txt
@@ -3,45 +3,19 @@ Mediatek Mt7621 PCIe PHY
 Required properties:
 - compatible: must be "mediatek,mt7621-pci-phy"
 - reg: base address and length of the PCIe PHY block
-- #address-cells: must be 1
-- #size-cells: must be 0
-
-Each PCIe PHY should be represented by a child node
-
-Required properties For the child node:
-- reg: the PHY ID
-0 - PCIe RC 0
-1 - PCIe RC 1
-- #phy-cells: must be 0
+- #phy-cells: must be <1> for pcie0_phy and for pcie1_phy.
 
 Example:
-       pcie0_phy: pcie-phy@1a149000 {
+       pcie0_phy: pcie-phy@1e149000 {
                compatible = "mediatek,mt7621-pci-phy";
-               reg = <0x1a149000 0x0700>;
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               pcie0_port: pcie-phy@0 {
-                       reg = <0>;
-                       #phy-cells = <0>;
-               };
-
-               pcie1_port: pcie-phy@1 {
-                       reg = <1>;
-                       #phy-cells = <0>;
-               };
+               reg = <0x1e149000 0x0700>;
+               #phy-cells = <1>;
        };
 
-       pcie1_phy: pcie-phy@1a14a000 {
+       pcie1_phy: pcie-phy@1e14a000 {
                compatible = "mediatek,mt7621-pci-phy";
-               reg = <0x1a14a000 0x0700>;
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               pcie2_port: pcie-phy@0 {
-                       reg = <0>;
-                       #phy-cells = <0>;
-               };
+               reg = <0x1e14a000 0x0700>;
+               #phy-cells = <1>;
        };
 
        /* users of the PCIe phy */
@@ -49,6 +23,6 @@ Example:
        pcie: pcie@1e140000 {
                ...
                ...
-               phys = <&pcie0_port>, <&pcie1_port>, <&pcie2_port>;
+               phys = <&pcie0_phy 0>, <&pcie0_phy 1>, <&pcie1_phy 0>;
                phy-names = "pcie-phy0", "pcie-phy1", "pcie-phy2";
-       };
\ No newline at end of file
+       };