am af5aa1f4: Don\'t treat dvmJitToPatchPredictedChain as a Jit-to-Interp entry point.

* commit 'af5aa1f4ce7eecc1b47a4c038cebb67d33f08f18':
  Don't treat dvmJitToPatchPredictedChain as a Jit-to-Interp entry point.

diff --git a/vm/compiler/codegen/arm/Assemble.c b/vm/compiler/codegen/arm/Assemble.c
index b5c04f5..e52c26c 100644 (file)
--- a/vm/compiler/codegen/arm/Assemble.c
+++ b/vm/compiler/codegen/arm/Assemble.c
@@ -1562,12 +1562,8 @@ static void inlineCachePatchEnqueue(PredictedChainingCell *cellAddr,
  *      rechain attempt to happen.
  *   2) Chain is not setup because the callee has not been created yet. Reset
  *      the rechain count to a small number and retry in the near future.
- *   3) Ask all other threads to stop before patching this chaining cell.
- *      This is required because another thread may have passed the class check
- *      but hasn't reached the chaining cell yet to follow the chain. If we
- *      patch the content before halting the other thread, there could be a
- *      small window for race conditions to happen that it may follow the new
- *      but wrong chain to invoke a different method.
+ *   3) Enqueue the new content for the chaining cell which will be appled in
+ *      next safe point.
  */
 const Method *dvmJitToPatchPredictedChain(const Method *method,
                                           InterpState *interpState,

diff --git a/vm/compiler/codegen/arm/CalloutHelper.h b/vm/compiler/codegen/arm/CalloutHelper.h
index d6eb421..c432f82 100644 (file)
--- a/vm/compiler/codegen/arm/CalloutHelper.h
+++ b/vm/compiler/codegen/arm/CalloutHelper.h
@@ -80,6 +80,12 @@ ArrayObject* dvmAllocArrayByClass(ClassObject* arrayClass, // OP_NEW_ARRAY
 bool dvmInterpHandleFillArrayData(ArrayObject* arrayObject,// OP_FILL_ARRAY_DATA
                                   const u2* arrayData);
 
+/* Originally declared in compiler/codegen/arm/Assemble.c */
+const Method *dvmJitToPatchPredictedChain(const Method *method,
+                                          InterpState *interpState,
+                                          PredictedChainingCell *cell,
+                                          const ClassObject *clazz);
+
 /*
  * Switch dispatch offset calculation for OP_PACKED_SWITCH & OP_SPARSE_SWITCH
  * Used in CodegenDriver.c

diff --git a/vm/compiler/codegen/arm/CodegenDriver.c b/vm/compiler/codegen/arm/CodegenDriver.c
index 0f6b7e9..b265579 100644 (file)
--- a/vm/compiler/codegen/arm/CodegenDriver.c
+++ b/vm/compiler/codegen/arm/CodegenDriver.c
@@ -1111,7 +1111,7 @@ static void genInvokeSingletonCommon(CompilationUnit *cUnit, MIR *mir,
  * 0x426a99b8 : ldr     r0, [r7, #44] --> r0 <- this->class->vtable[methodIdx]
  * 0x426a99ba : cmp     r1, #0        --> compare r1 (rechain count) against 0
  * 0x426a99bc : bgt     0x426a99c2    --> >=0? don't rechain
- * 0x426a99be : ldr     r7, [r6, #96] --+ dvmJitToPatchPredictedChain
+ * 0x426a99be : ldr     r7, [pc, #off]--+ dvmJitToPatchPredictedChain
  * 0x426a99c0 : blx     r7            --+
  * 0x426a99c2 : add     r1, pc, #12   --> r1 <- &retChainingCell
  * 0x426a99c4 : blx_1   0x426a9098    --+ TEMPLATE_INVOKE_METHOD_NO_OPT
@@ -1183,8 +1183,7 @@ static void genInvokeVirtualCommon(CompilationUnit *cUnit, MIR *mir,
     /* Check if rechain limit is reached */
     ArmLIR *bypassRechaining = genCmpImmBranch(cUnit, kArmCondGt, r1, 0);
 
-    loadWordDisp(cUnit, rGLUE, offsetof(InterpState,
-                 jitToInterpEntries.dvmJitToPatchPredictedChain), r7);
+    LOAD_FUNC_ADDR(cUnit, r7, (int) dvmJitToPatchPredictedChain);
 
     genRegCopy(cUnit, r1, rGLUE);
 
@@ -2930,7 +2929,7 @@ static bool handleFmt35c_3rc(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb,
          * 0x47357e6e : mov     r1, r8         --> r1 <- &retChainingCell
          * 0x47357e70 : cmp     r1, #0         --> compare against 0
          * 0x47357e72 : bgt     0x47357e7c     --> >=0? don't rechain
-         * 0x47357e74 : ldr     r7, [r6, #108] --+
+         * 0x47357e74 : ldr     r7, [pc, #off] --+
          * 0x47357e76 : mov     r2, r9           | dvmJitToPatchPredictedChain
          * 0x47357e78 : mov     r3, r10          |
          * 0x47357e7a : blx     r7             --+
@@ -3073,8 +3072,7 @@ static bool handleFmt35c_3rc(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb,
             ArmLIR *bypassRechaining = genCmpImmBranch(cUnit, kArmCondGt,
                                                        r1, 0);
 
-            loadWordDisp(cUnit, rGLUE, offsetof(InterpState,
-                         jitToInterpEntries.dvmJitToPatchPredictedChain), r7);
+            LOAD_FUNC_ADDR(cUnit, r7, (int) dvmJitToPatchPredictedChain);
 
             genRegCopy(cUnit, r1, rGLUE);
             genRegCopy(cUnit, r2, r9);

diff --git a/vm/compiler/codegen/x86/Assemble.c b/vm/compiler/codegen/x86/Assemble.c
index 3c0b3c7..dbb9b02 100644 (file)
--- a/vm/compiler/codegen/x86/Assemble.c
+++ b/vm/compiler/codegen/x86/Assemble.c
@@ -95,12 +95,8 @@ void* dvmJitChain(void* tgtAddr, u4* branchAddr)
  *      rechain attempt to happen.
  *   2) Chain is not setup because the callee has not been created yet. Reset
  *      the rechain count to a small number and retry in the near future.
- *   3) Ask all other threads to stop before patching this chaining cell.
- *      This is required because another thread may have passed the class check
- *      but hasn't reached the chaining cell yet to follow the chain. If we
- *      patch the content before halting the other thread, there could be a
- *      small window for race conditions to happen that it may follow the new
- *      but wrong chain to invoke a different method.
+ *   3) Enqueue the new content for the chaining cell which will be appled in
+ *      next safe point.
  */
 const Method *dvmJitToPatchPredictedChain(const Method *method,
                                           InterpState *interpState,

diff --git a/vm/interp/Interp.c b/vm/interp/Interp.c
index 1dde646..5df459a 100644 (file)
--- a/vm/interp/Interp.c
+++ b/vm/interp/Interp.c
@@ -1240,7 +1240,6 @@ void dvmInterpret(Thread* self, const Method* method, JValue* pResult)
     extern void dvmJitToInterpSingleStep();
     extern void dvmJitToInterpTraceSelectNoChain();
     extern void dvmJitToInterpTraceSelect();
-    extern void dvmJitToPatchPredictedChain();
 #if defined(WITH_SELF_VERIFICATION)
     extern void dvmJitToInterpBackwardBranch();
 #endif
@@ -1256,7 +1255,6 @@ void dvmInterpret(Thread* self, const Method* method, JValue* pResult)
         dvmJitToInterpSingleStep,
         dvmJitToInterpTraceSelectNoChain,
         dvmJitToInterpTraceSelect,
-        dvmJitToPatchPredictedChain,
 #if defined(WITH_SELF_VERIFICATION)
         dvmJitToInterpBackwardBranch,
 #endif

diff --git a/vm/interp/InterpDefs.h b/vm/interp/InterpDefs.h
index 2a20bfc..78ec711 100644 (file)
--- a/vm/interp/InterpDefs.h
+++ b/vm/interp/InterpDefs.h
@@ -75,7 +75,6 @@ struct JitToInterpEntries {
     void *dvmJitToInterpSingleStep;
     void *dvmJitToInterpTraceSelectNoChain;
     void *dvmJitToInterpTraceSelect;
-    void *dvmJitToPatchPredictedChain;
 #if defined(WITH_SELF_VERIFICATION)
     void *dvmJitToInterpBackwardBranch;
 #endif