Switch MIPS movn/movz to TCG.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4506 c046a42c-6fe2-441c-8c8c-71466251a162

diff --git a/target-mips/op.c b/target-mips/op.c
index c7162d6..80ea364 100644 (file)
--- a/target-mips/op.c
+++ b/target-mips/op.c
@@ -510,20 +510,6 @@ void op_dmultu (void)
 #endif
 
 /* Conditional moves */
-void op_movn (void)
-{
-    if (T1 != 0)
-        env->gpr[env->current_tc][PARAM1] = T0;
-    FORCE_RET();
-}
-
-void op_movz (void)
-{
-    if (T1 == 0)
-        env->gpr[env->current_tc][PARAM1] = T0;
-    FORCE_RET();
-}
-
 void op_movf (void)
 {
     if (!(env->fpu->fcr31 & PARAM1))

diff --git a/target-mips/translate.c b/target-mips/translate.c
index dbd9c9f..53fec05 100644 (file)
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -1707,11 +1707,23 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc,
         opn = "mul";
         break;
     case OPC_MOVN:
-        gen_op_movn(rd);
+        {
+            int l1 = gen_new_label();
+
+            tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[1], tcg_const_tl(0), l1);
+            gen_op_store_gpr_T0(rd);
+            gen_set_label(l1);
+        }
         opn = "movn";
         goto print;
     case OPC_MOVZ:
-        gen_op_movz(rd);
+        {
+            int l1 = gen_new_label();
+
+            tcg_gen_brcond_tl(TCG_COND_NE, cpu_T[1], tcg_const_tl(0), l1);
+            gen_op_store_gpr_T0(rd);
+            gen_set_label(l1);
+        }
         opn = "movz";
         goto print;
     case OPC_SLLV: