#
i8253.cpp
i8259.cpp
- hd46505.cpp
msm58321.cpp
- upd71071.cpp
# mb8877.cpp
scsi_dev.cpp
scsi_host.cpp
set(VMFILES_LIB
pcm1bit.cpp
mb8877.cpp
+ hd46505.cpp
+ upd71071.cpp
i8251.cpp
hd63484.cpp
set(EXEC_TARGET emugamegear)
add_definitions(-D_GAMEGEAR)
set(VMFILES ${VMFILES}
-# ym2413.cpp
- sn76489an.cpp
- 315-5124.cpp
-# upd765a.cpp
-
datarec.cpp
-# disk.cpp
)
set(VMFILES_LIB ${VMFILES_LIB}
+ sn76489an.cpp
+ 315-5124.cpp
upd765a.cpp
disk.cpp
)
elseif(BUILD_MARK3)
set(EXEC_TARGET emumark3)
add_definitions(-D_MASTERSYSTEM)
- set(VMFILES ${VMFILES}
+ set(VMFILES_LIB ${VMFILES_LIB}
315-5124.cpp
ym2413.cpp
sn76489an.cpp
elseif(BUILD_MASTERSYSTEM)
set(EXEC_TARGET emumastersystem)
add_definitions(-D_MASTERSYSTEM)
- set(VMFILES ${VMFILES}
+ set(VMFILES_LIB ${VMFILES_LIB}
315-5124.cpp
ym2413.cpp
sn76489an.cpp
i8255.cpp
z80ctc.cpp
- hd46505.cpp
datarec.cpp
io.cpp
pcm1bit.cpp
upd765a.cpp
disk.cpp
+ hd46505.cpp
)
if(NOT BUILD_PASOPIA)
add_definitions(-D_PASOPIA7)
set(RESOURCE ${CMAKE_SOURCE_DIR}/../../src/qt/common/qrc/pasopia7.qrc)
- set(VMFILES ${VMFILES} sn76489an.cpp)
+ set(VMFILES_LIB ${VMFILES_LIB} sn76489an.cpp)
elseif(BUILD_PASOPIA7_LCD)
set(VM_NAME pasopia7)
add_definitions(-D_LCD)
set(RESOURCE ${CMAKE_SOURCE_DIR}/../../src/qt/common/qrc/pasopia7_lcd.qrc)
- set(VMFILES ${VMFILES} sn76489an.cpp)
+ set(VMFILES_LIB ${VMFILES_LIB} sn76489an.cpp)
include_directories(${CMAKE_CURRENT_SOURCE_DIR}/../../src/vm/pasopia7)
endif()
set(FLAG_USE_Z80 ON)
set(VMFILES_BASE
-
i8255.cpp
i8253.cpp
# mb8877.cpp
# disk.cpp
- sn76489an.cpp
z80sio.cpp
)
+
set(VMFILES_MZ1500 ${VMFILES_MZ800}
prnfile.cpp
mz1p17.cpp
disk.cpp
not.cpp
z80pio.cpp
+ sn76489an.cpp
)
+
set(VMFILES_LIB_MZ1500 ${VMFILES_LIB_MZ800}
ym2203.cpp
)
i8255.cpp
# upd765a.cpp
- upd71071.cpp
-
+
# disk.cpp
event.cpp
io.cpp
prnfile.cpp
)
set(VMFILES_LIB
+ upd71071.cpp
beep.cpp
ls244.cpp
not.cpp
if(BUILD_SMC70)
set(EXEC_TARGET emusmc70)
set(VMFILES_BASE
- hd46505.cpp
-
msm58321.cpp
datarec.cpp
event.cpp
)
set(VMFILES_LIB
+ hd46505.cpp
pcm1bit.cpp
mb8877.cpp
disk.cpp
set(EXEC_TARGET emusmc777)
set(VMFILES_BASE
-
- hd46505.cpp
- sn76489an.cpp
-
- datarec.cpp
- event.cpp
- )
-set(VMFILES_LIB
- pcm1bit.cpp
- mb8877.cpp
- disk.cpp
-)
+ hd46505.cpp
+ datarec.cpp
+ event.cpp
+ )
+ set(VMFILES_LIB
+ hd46505.cpp
+ sn76489an.cpp
+ pcmibit.cpp
+ mb8877.cpp
+ disk.cpp
+ )
add_definitions(-D_SMC777)
set(RESOURCE ${CMAKE_SOURCE_DIR}/../../src/qt/common/qrc/smc777.qrc)
endif()
set(WITH_MOUSE ON)
set(VMFILES
- hd46505.cpp
+# hd46505.cpp
i8255.cpp
upd1990a.cpp
z80ctc.cpp
mz1p17.cpp
)
set(VMFILES_LIB
+ hd46505.cpp
mcs48.cpp
beep.cpp
z80pio.cpp
elseif(BUILD_X1TURBO)
set(EXEC_TARGET emux1turbo)
add_definitions(-D_X1TURBO)
- set(VMFILES ${VMFILES} z80dma.cpp)
+ set(VMFILES_LIB ${VMFILES_LIB} z80dma.cpp)
set(RESOURCE ${CMAKE_SOURCE_DIR}/../../src/qt/common/qrc/x1turbo.qrc)
elseif(BUILD_X1TURBOZ)
set(EXEC_TARGET emux1turboz)
add_definitions(-D_X1TURBOZ)
- set(VMFILES ${VMFILES} z80dma.cpp)
+ set(VMFILES_LIB ${VMFILES_LIB} z80dma.cpp)
set(RESOURCE ${CMAKE_SOURCE_DIR}/../../src/qt/common/qrc/x1turboz.qrc)
elseif(BUILD_X1TWIN)
set(EXEC_TARGET emux1twin)
set(FLAG_USE_Z80 ON)
set(VMFILES
- sn76489an.cpp
- tms9918a.cpp
-
io.cpp
event.cpp
)
+set(VMFILES_LIB
+ tms9918a.cpp
+ sn76489an.cpp
+)
set(BUILD_SHARED_LIBS OFF)
set(USE_OPENMP ON CACHE BOOL "Build using OpenMP")
set(USE_OPENGL ON CACHE BOOL "Build using OpenGL")
event.cpp
)
-
+set(VMFILES_LIB
+ ym2413.cpp
+)
set(USE_OPENMP ON CACHE BOOL "Build using OpenMP")
set(USE_OPENGL ON CACHE BOOL "Build using OpenGL")
set(WITH_DEBUGGER OFF CACHE BOOL "Build with debugger.")
i8259.cpp
fmr50/bios.cpp
- sn76489an.cpp
- mb8877.cpp
scsi_dev.cpp
scsi_host.cpp
scsi_hdd.cpp
io.cpp
- disk.cpp
event.cpp
)
set(VMFILES_LIB
pcm1bit.cpp
i8251.cpp
+ sn76489an.cpp
+ mb8877.cpp
+ disk.cpp
)
set(BUILD_FMR30_86 OFF CACHE BOOL "Build for FM-R30, i86 version")
i8259.cpp
fmr50/bios.cpp
- sn76489an.cpp
- mb8877.cpp
scsi_dev.cpp
scsi_host.cpp
scsi_hdd.cpp
io.cpp
- disk.cpp
event.cpp
)
set(VMFILES_LIB
pcm1bit.cpp
i8251.cpp
+ sn76489an.cpp
+ mb8877.cpp
+ disk.cpp
)
set(BUILD_FMR30_86 ON CACHE BOOL "Build for FM-R30, i86 version")
set(FLAG_USE_Z80 ON)
set(VMFILES
upd7801.cpp
- hd46505.cpp
-
+# hd46505.cpp
# upd765a.cpp
-
- ym2203.cpp
-
+# ym2203.cpp
+# disk.cpp
datarec.cpp
-# disk.cpp
+
event.cpp
io.cpp
memory.cpp
set(VMFILES_LIB
upd765a.cpp
# pcm1bit.cpp
+ ym2203.cpp
+ hd46505.cpp
beep.cpp
disk.cpp
)
i8237.cpp
i8253.cpp
i8259.cpp
- hd46505.cpp
-
io.cpp
-
event.cpp
)
set(VMFILES_LIB
+ hd46505.cpp
pcm1bit.cpp
upd765a.cpp
disk.cpp
add_definitions(-D_J3100GT)
set(RESOURCE ${CMAKE_SOURCE_DIR}/../../src/qt/common/qrc/j3100gt.qrc)
set(VMFILES ${VMFILES}
- i286.cpp
- hd146818p.cpp
- )
+ i286.cpp
+ )
+ set(VMFILES_LIB ${VMFILES_LIB}
+ hd146818p.cpp
+ )
elseif(BUILD_J3100SL)
set(EXEC_TARGET emuj3100sl)
set(RESOURCE ${CMAKE_SOURCE_DIR}/../../src/qt/common/qrc/j3100sl.qrc)
set(WITH_MOUSE ON)
set(VMFILES
- hd46505.cpp
i8237.cpp
i8253.cpp
i8259.cpp
)
set(VMFILES_LIB
+ hd46505.cpp
pcm1bit.cpp
upd765a.cpp
disk.cpp
set(RESOURCE ${CMAKE_SOURCE_DIR}/../../src/qt/common/qrc/j3100gt.qrc)
set(VMFILES ${VMFILES}
i286.cpp
- hd146818p.cpp
)
+ set(VMFILES_LIB ${VMFILES_LIB}
+ hd146818p.cpp
+ )
elseif(BUILD_J3100SL)
set(EXEC_TARGET emuj3100sl)
set(RESOURCE ${CMAKE_SOURCE_DIR}/../../src/qt/common/qrc/j3100sl.qrc)
mc6800.cpp
memory.cpp
- hd44102.cpp
datarec.cpp
event.cpp
)
set(VMFILES_LIB
+ hd44102.cpp
pcm1bit.cpp
)
set(VMFILES_BASE
# i86.cpp
-
- hd46505.cpp
+
i8253.cpp
i8255.cpp
i8259.cpp
io.cpp
memory.cpp
-
- sn76489an.cpp
-
event.cpp
)
set(VMFILES_LIB
i8251.cpp
+ hd46505.cpp
pcm1bit.cpp
not.cpp
-
upd765a.cpp
+ sn76489an.cpp
disk.cpp
)
set(FLAG_USE_I86 ON)
set(FLAG_USE_Z80 ON)
set(VMFILES_BASE
- sn76489an.cpp
- tms9918a.cpp
z80ctc.cpp
memory.cpp
)
set(VMFILES_LIB
+ sn76489an.cpp
+ tms9918a.cpp
)
set(USE_OPENMP ON CACHE BOOL "Build using OpenMP")
set(USE_OPENGL ON CACHE BOOL "Build using OpenGL")
set(USE_FMGEN OFF)
set(FLAG_USE_Z80 ON)
set(VMFILES
- hd46505.cpp
i8255.cpp
msm5832.cpp
- sn76489an.cpp
-
datarec.cpp
event.cpp
io.cpp
)
+set(VMFILES_LIB
+ hd46505.cpp
+ sn76489an.cpp
+)
set(BUILD_MYCOMZ80A ON CACHE BOOL "Build EMU-MYCOMZ80A")
set(BUILD_SHARED_LIBS OFF)
i8255.cpp
i8259.cpp
rp5c01.cpp
- upd71071.cpp
+
z80pio.cpp
z80sio.cpp
mz1p17.cpp
)
set(VMFILES_LIB
# i286.cpp
- mb8877.cpp
- not.cpp
- pcm1bit.cpp
- ym2203.cpp
- disk.cpp
+ upd71071.cpp
+ mb8877.cpp
+ not.cpp
+ pcm1bit.cpp
+ ym2203.cpp
+ disk.cpp
)
set(FLAG_USE_I286 ON)
set(FLAG_USE_Z80 ON)
set(VMFILES
- sn76489an.cpp
- tms9918a.cpp
-
io.cpp
memory.cpp
-
event.cpp
)
+set(VMFILES_LIB
+ sn76489an.cpp
+ tms9918a.cpp
+)
set(BUILD_SHARED_LIBS OFF)
set(USE_OPENMP ON CACHE BOOL "Build using OpenMP")
set(VMFILES_BASE
tms9995.cpp
- sn76489an.cpp
- tms9918a.cpp
-
datarec.cpp
-
event.cpp
memory.cpp
)
+set(VMFILES_LIB
+ sn76489an.cpp
+ tms9918a.cpp
+)
set(BUILD_SHARED_LIBS OFF)
set(USE_OPENMP ON CACHE BOOL "Build using OpenMP")
set(FLAG_USE_Z80 ON)
set(VMFILES
- sn76489an.cpp
datarec.cpp
io.cpp
event.cpp
)
-
+set(VMFILES_LIB
+ sn76489an.cpp
+)
+
set(BUILD_SHARED_LIBS OFF)
set(USE_OPENMP ON CACHE BOOL "Build using OpenMP")
set(USE_OPENGL ON CACHE BOOL "Build using OpenGL")
set(FLAG_USE_Z80 ON)
set(VMFILES
i8255.cpp
-
- sn76489an.cpp
- tms9918a.cpp
datarec.cpp
-
io.cpp
event.cpp
)
set(VMFILES_LIB
+ i8251.cpp
+ sn76489an.cpp
+ tms9918a.cpp
upd765a.cpp
disk.cpp
- i8251.cpp
)
set(BUILD_SHARED_LIBS OFF)
0x30303030,
};
-#ifdef _MASTERSYSTEM
+//#ifdef _MASTERSYSTEM
static const uint8_t tms_crom[] =
{
0x00, 0x00, 0x08, 0x0C,
0x02, 0x03, 0x05, 0x0F,
0x04, 0x33, 0x15, 0x3F
};
-#endif
+//#endif
/* Mark a pattern as dirty */
#define MARK_BG_DIRTY(addr) \
void _315_5124::initialize()
{
DEVICE::initialize();
+ __MASTERSYSTEM = osd->check_feature(_T("_MASTERSYSTEM"));
+ __315_5124_LIMIT_SPRITES = osd->check_feature(_T("_315_5124_LIMIT_SPRITES"));
// Game Gear : console = 0x40, vdp_mode = 4
// Mark3 : console = 0x20, vdp_mode = 4
// SC-3000 : console = 0x10, vdp_mode = 0
palette_pc[29]=RGB_COLOR(0, 0, 0);
palette_pc[30]=RGB_COLOR(0, 0, 0);
palette_pc[31]=RGB_COLOR(0, 0, 0);
-#ifdef _MASTERSYSTEM // 315-5124 palette
- if (console) { // without COLECO
- for (i = 0; i < 32; i++) {
- int r = (tms_crom[i & 0x0F] >> 0) & 3;
- int g = (tms_crom[i & 0x0F] >> 2) & 3;
- int b = (tms_crom[i & 0x0F] >> 4) & 3;
- r = sms_cram_expand_table[r];
- g = sms_cram_expand_table[g];
- b = sms_cram_expand_table[b];
- palette_pc[i]=RGB_COLOR(r, g, b);
+//#ifdef _MASTERSYSTEM // 315-5124 palette
+ if(__MASTERSYSTEM) {
+ if (console) { // without COLECO
+ for (i = 0; i < 32; i++) {
+ int r = (tms_crom[i & 0x0F] >> 0) & 3;
+ int g = (tms_crom[i & 0x0F] >> 2) & 3;
+ int b = (tms_crom[i & 0x0F] >> 4) & 3;
+ r = sms_cram_expand_table[r];
+ g = sms_cram_expand_table[g];
+ b = sms_cram_expand_table[b];
+ palette_pc[i]=RGB_COLOR(r, g, b);
+ }
}
}
-#endif
+//#endif
vp_x = (console == 0x40) ? 48 : 0;
vp_y = (console == 0x40) ? 24 : 0;
vp_w = (console == 0x40) ? 160 : 256;
{
// update screen buffer
for(int y = 0; y < 192; y++) {
- scrntype_t* dest = emu->get_screen_buffer(y);
+ //scrntype_t* dest = emu->get_screen_buffer(y);
+ scrntype_t* dest = osd->get_vm_screen_buffer(y);
uint8_t* src = screen[y];
for(int x = 0; x < 256; x++) {
if (x>=vp_x && x<vp_x+vp_w && y>=vp_y && y<vp_y+vp_h) {
illegal_sprite = p;
}
}
-#ifdef _315_5124_LIMIT_SPRITES
- continue;
-#endif
+//#ifdef _315_5124_LIMIT_SPRITES
+ if(__315_5124_LIMIT_SPRITES) {
+ continue;
+ }
+//#endif
} else {
limit[yy]--;
}
illegal_sprite = p;
}
}
-#ifdef _315_5124_LIMIT_SPRITES
- continue;
-#endif
+//#ifdef _315_5124_LIMIT_SPRITES
+ if(__315_5124_LIMIT_SPRITES) {
+ continue;
+ }
+//#endif
} else {
limit[yy]--;
}
#ifndef _315_5124_H_
#define _315_5124_H_
-#include "vm.h"
-#include "../emu.h"
+//#include "vm.h"
+//#include "../emu.h"
#include "device.h"
#define read_dword(address) *(uint32_t *)address
#define CYCLES_PER_LINE 228
+class KEYBOARD;
class _315_5124 : public DEVICE
{
private:
int vp_w;
int vp_h;
int console;
+ bool __MASTERSYSTEM;
+ bool __315_5124_LIMIT_SPRITES;
+
public:
_315_5124(VM* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
{
message("* vm/common_vm")
set(s_vm_common_vm_srcs
+ ../315-5124.cpp
../and.cpp
../ay_3_891x.cpp
../beep.cpp
+# ../datarec.cpp
+ ../disk.cpp
../hd146818p.cpp
+ ../hd46505.cpp
../hd63484.cpp
+# ../huc6280.cpp
+# ../i286.cpp
+# ../i386.cpp
+# ../i8080.cpp
+
../i8155.cpp
-
+# ../i8237.cpp
../i8251.cpp
-
+# ../i8253.cpp
+# ../i8255.cpp
# ../i8259.cpp
+# ../i86.cpp
+# ../io.cpp
# ../ld700.cpp
../ls244.cpp
../ls393.cpp
- ../noise.cpp
+
../m6502_base.cpp
+ ../mb8877.cpp
+# ../mc6800.cpp
# MC6809 is temporally.
-
../mc6809_base.cpp
../mc6820.cpp
../mc6840.cpp
../mc6847_base.cpp
-
- ../libcpu_newdev/mcs48_base.cpp
- ../libcpu_newdev/i86_base.cpp
-
+# ../mcs48.cpp
../msm5205.cpp
../msm58321_base.cpp
-
+# ../mz1p17.cpp
+# ../n2a03.cpp
../nand.cpp
+ ../noise.cpp
../nor.cpp
../not.cpp
../or.cpp
-
../pc6031.cpp
../pc80s31k.cpp
../pcm1bit.cpp
# ../prnfile.cpp
-# ../ptf20.cpp
+ ../ptf20.cpp
# ../rp5c01.cpp
# ../scsi_cdrom.cpp
# ../scsi_dev.cpp
# ../scsi_hdd.cpp
# ../scsi_host.cpp
-# ../sn76489an.cpp
+ ../sn76489an.cpp
# ../sy6522.cpp
../t3444a.cpp
../tf20.cpp
../upd16434.cpp
# ../upd1990a.cpp
../upd4991a.cpp
-# ../upd71071.cpp
+ ../upd71071.cpp
# ../upd7220.cpp
../upd765a.cpp
../upd7752.cpp
../ym2413.cpp
../z80_base.cpp
# ../z80ctc.cpp
-# ../z80dma.cpp
+ ../z80dma.cpp
../z80pio.cpp
# ../z80sio.cpp
- ../disk.cpp
- ../mb8877.cpp
+
+ ../libcpu_newdev/mcs48_base.cpp
+ ../libcpu_newdev/i86_base.cpp
../libcpu_newdev/libcpu_i386/i386_opdef.cpp
../libcpu_newdev/libcpu_i386/i386_base_ext.cpp
${s_vm_common_vm_srcs}
)
set_target_properties(CSPcommon_vm PROPERTIES
- SOVERSION 1.1.2
- VERSION 1.1.2
+ SOVERSION 1.1.3
+ VERSION 1.1.3
)
INSTALL(TARGETS CSPcommon_vm DESTINATION ${LIBCSP_INSTALL_DIR})
endif()
[ keyboard ]
*/
+#include "../vm.h"
+#include "../../emu.h"
#include "keyboard.h"
#include "../i8255.h"
#ifndef _KEYBOARD_H_
#define _KEYBOARD_H_
-#include "../vm.h"
-#include "../../emu.h"
+//#include "../vm.h"
+//#include "../../emu.h"
#include "../device.h"
#define SIG_KEYBOARD_COLUMN 0
void HD44102::initialize()
{
DEVICE::initialize();
+ _SCREEN_WIDTH = osd->get_feature_int_value(_T("SCREEN_WIDTH"));
+ _SCREEN_HEIGHT = osd->get_feature_int_value(_T("SCREEN_HEIGHT"));
// m_cs2 = 0;
m_page = 0;
m_x = 0;
int dy = m_sy + 8 * sy + b;
int dx = m_sx + sx;
- if(dx >= 0 && dx < SCREEN_WIDTH && dy >= 0 && dy < SCREEN_HEIGHT) {
+ if(dx >= 0 && dx < _SCREEN_WIDTH && dy >= 0 && dy < _SCREEN_HEIGHT) {
int color = (m_status & STATUS_DISPLAY_OFF) ? 0 : ((data >> b) & 0x01);
- scrntype_t *dest = emu->get_screen_buffer(m_sy + sy * 8 + b) + (m_sx + sx);
+ //scrntype_t *dest = emu->get_screen_buffer(m_sy + sy * 8 + b) + (m_sx + sx);
+ scrntype_t *dest = osd->get_vm_screen_buffer(m_sy + sy * 8 + b) + (m_sx + sx);
*dest = color ? color_on : color_back;
}
}
#ifndef _HD44102_H_
#define _HD44102_H_
-#include "vm.h"
-#include "../emu.h"
+//#include "vm.h"
+//#include "../emu.h"
#include "device.h"
//#define SIG_HD44102_CS2 0
// int m_sx;
// int m_sy;
+ int _SCREEN_WIDTH;
+ int _SCREEN_HEIGHT;
uint8_t status_r();
void control_w(uint8_t data);
public:
HD44102(VM* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
{
+ _SCREEN_WIDTH = 192;
+ _SCREEN_HEIGHT = 64;
set_device_name(_T("HD44102 LCD Controller"));
}
~HD44102() {}
void HD46505::initialize()
{
DEVICE::initialize();
+ if(osd->check_feature(_T("CHARS_PER_LINE"))) {
+ _CHARS_PER_LINE = osd->get_feature_int_value(_T("CHARS_PER_LINE"));
+ } else {
+ _CHARS_PER_LINE = -1;
+ }
+ _SCREEN_WIDTH = osd->get_feature_int_value(_T("SCREEN_WIDTH"));
+ _SCREEN_HEIGHT = osd->get_feature_int_value(_T("SCREEN_HEIGHT"));
+ if(osd->check_feature(_T("LINES_PER_FRAME"))) {
+ _LINES_PER_FRAME = osd->get_feature_int_value(_T("LINES_PER_FRAME"));
+ } else {
+ _LINES_PER_FRAME = 64;
+ }
+ _HD46505_CHAR_CLOCK = osd->get_feature_int_value(_T("HD46505_CHAR_CLOCK"));
+ _HD46505_HORIZ_FREQ = osd->get_feature_int_value(_T("HD46505_HORIZ_FREQ"));
+
memset(regs, 0, sizeof(regs));
memset(regs_written, 0, sizeof(regs_written));
ch = 0;
// initial settings for 1st frame
-#ifdef CHARS_PER_LINE
- hz_total = (CHARS_PER_LINE > 54) ? CHARS_PER_LINE : 54;
-#else
- hz_total = 54;
-#endif
+//#ifdef CHARS_PER_LINE
+ if(_CHARS_PER_LINE >= 0) {
+ hz_total = (_CHARS_PER_LINE > 54) ? _CHARS_PER_LINE : 54;
+ } else {
+ hz_total = 54;
+ }
+//#else
+// hz_total = 54;
+//#endif
hz_disp = (hz_total > 80) ? 80 : 40;
hs_start = hz_disp + 4;
hs_end = hs_start + 4;
- vt_total = LINES_PER_FRAME;
- vt_disp = (SCREEN_HEIGHT > LINES_PER_FRAME) ? (SCREEN_HEIGHT >> 1) : SCREEN_HEIGHT;
+ vt_total = _LINES_PER_FRAME;
+ vt_disp = (_SCREEN_HEIGHT > _LINES_PER_FRAME) ? (_SCREEN_HEIGHT >> 1) : _SCREEN_HEIGHT;
vs_start = vt_disp + 16;
vs_end = vs_start + 16;
timing_changed = false;
disp_end_clock = 0;
-#if defined(HD46505_CHAR_CLOCK)
- char_clock = 0;
- next_char_clock = HD46505_CHAR_CLOCK;
-#elif defined(HD46505_HORIZ_FREQ)
- horiz_freq = 0;
- next_horiz_freq = HD46505_HORIZ_FREQ;
-#endif
+//#if defined(HD46505_CHAR_CLOCK)
+ if(_HD46505_CHAR_CLOCK > 0) {
+ char_clock = 0;
+ next_char_clock = _HD46505_CHAR_CLOCK;
+ } else
+//#elif defined(HD46505_HORIZ_FREQ)
+ if(_HD46505_HORIZ_FREQ > 0) {
+ horiz_freq = 0;
+ next_horiz_freq = _HD46505_HORIZ_FREQ;
+ }
+//#endif
}
void HD46505::write_io8(uint32_t addr, uint32_t data)
}
timing_changed = false;
disp_end_clock = 0;
-#if defined(HD46505_CHAR_CLOCK)
+//#if defined(HD46505_CHAR_CLOCK)
char_clock = 0;
-#elif defined(HD46505_HORIZ_FREQ)
+//#elif defined(HD46505_HORIZ_FREQ)
horiz_freq = 0;
-#endif
+//#endif
}
}
-#if defined(HD46505_CHAR_CLOCK)
- if(char_clock != next_char_clock) {
- char_clock = next_char_clock;
- frames_per_sec = char_clock / (double)vt_total / (double)hz_total;
- if(regs[8] & 1) {
- frames_per_sec *= 2; // interlace mode
+//#if defined(HD46505_CHAR_CLOCK)
+ if(_HD46505_CHAR_CLOCK > 0) {
+ if(char_clock != next_char_clock) {
+ char_clock = next_char_clock;
+ frames_per_sec = char_clock / (double)vt_total / (double)hz_total;
+ if(regs[8] & 1) {
+ frames_per_sec *= 2; // interlace mode
+ }
+ set_frames_per_sec(frames_per_sec);
}
- set_frames_per_sec(frames_per_sec);
}
-#elif defined(HD46505_HORIZ_FREQ)
- if(horiz_freq != next_horiz_freq) {
- horiz_freq = next_horiz_freq;
- frames_per_sec = horiz_freq / (double)vt_total;
- if(regs[8] & 1) {
- frames_per_sec *= 2; // interlace mode
+//#elif defined(HD46505_HORIZ_FREQ)
+ else if(_HD46505_HORIZ_FREQ > 0) {
+ if(horiz_freq != next_horiz_freq) {
+ horiz_freq = next_horiz_freq;
+ frames_per_sec = horiz_freq / (double)vt_total;
+ if(regs[8] & 1) {
+ frames_per_sec *= 2; // interlace mode
+ }
+ set_frames_per_sec(frames_per_sec);
}
- set_frames_per_sec(frames_per_sec);
}
-#endif
+//#endif
}
void HD46505::update_timing(int new_clocks, double new_frames_per_sec, int new_lines_per_frame)
{
cpu_clocks = new_clocks;
-#if !defined(HD46505_CHAR_CLOCK) && !defined(HD46505_HORIZ_FREQ)
- frames_per_sec = new_frames_per_sec;
-#endif
+//#if !defined(HD46505_CHAR_CLOCK) && !defined(HD46505_HORIZ_FREQ)
+ if((_HD46505_CHAR_CLOCK <= 0) && (_HD46505_HORIZ_FREQ <= 0)) {
+ frames_per_sec = new_frames_per_sec;
+ }
+//#endif
// update event clocks
disp_end_clock = 0;
state_fio->FputInt32(ch);
state_fio->FputBool(timing_changed);
state_fio->FputInt32(cpu_clocks);
-#if defined(HD46505_CHAR_CLOCK)
- state_fio->FputDouble(char_clock);
- state_fio->FputDouble(next_char_clock);
-#elif defined(HD46505_HORIZ_FREQ)
- state_fio->FputDouble(horiz_freq);
- state_fio->FputDouble(next_horiz_freq);
-#endif
+//#if defined(HD46505_CHAR_CLOCK)
+ if(_HD46505_CHAR_CLOCK > 0) {
+ state_fio->FputDouble(char_clock);
+ state_fio->FputDouble(next_char_clock);
+ } else if(_HD46505_HORIZ_FREQ > 0) {
+//#elif defined(HD46505_HORIZ_FREQ)
+ state_fio->FputDouble(horiz_freq);
+ state_fio->FputDouble(next_horiz_freq);
+ }
+//#endif
state_fio->FputDouble(frames_per_sec);
state_fio->FputInt32(hz_total);
state_fio->FputInt32(hz_disp);
ch = state_fio->FgetInt32();
timing_changed = state_fio->FgetBool();
cpu_clocks = state_fio->FgetInt32();
-#if defined(HD46505_CHAR_CLOCK)
- char_clock = state_fio->FgetDouble();
- next_char_clock = state_fio->FgetDouble();
-#elif defined(HD46505_HORIZ_FREQ)
- horiz_freq = state_fio->FgetDouble();
- next_horiz_freq = state_fio->FgetDouble();
-#endif
+//#if defined(HD46505_CHAR_CLOCK)
+ if(_HD46505_CHAR_CLOCK > 0) {
+ char_clock = state_fio->FgetDouble();
+ next_char_clock = state_fio->FgetDouble();
+ } else if(_HD46505_HORIZ_FREQ > 0) {
+//#elif defined(HD46505_HORIZ_FREQ)
+ horiz_freq = state_fio->FgetDouble();
+ next_horiz_freq = state_fio->FgetDouble();
+ }
+//#endif
frames_per_sec = state_fio->FgetDouble();
hz_total = state_fio->FgetInt32();
hz_disp = state_fio->FgetInt32();
#ifndef _HD46505_H_
#define _HD46505_H_
-#include "vm.h"
-#include "../emu.h"
+//#include "vm.h"
+//#include "../emu.h"
#include "device.h"
class HD46505 : public DEVICE
bool timing_changed;
int cpu_clocks;
-#if defined(HD46505_CHAR_CLOCK)
+//#if defined(HD46505_CHAR_CLOCK)
double char_clock, next_char_clock;
-#elif defined(HD46505_HORIZ_FREQ)
+//#elif defined(HD46505_HORIZ_FREQ)
double horiz_freq, next_horiz_freq;
-#endif
+//#endif
double frames_per_sec;
int hz_total, hz_disp;
int hs_start_clock, hs_end_clock;
bool display, vblank, vsync, hsync;
+
+ int _SCREEN_WIDTH;
+ int _SCREEN_HEIGHT;
+ int _CHARS_PER_LINE;
+ int _LINES_PER_FRAME;
+ int _HD46505_CHAR_CLOCK;
+ int _HD46505_HORIZ_FREQ;
void set_display(bool val);
void set_vblank(bool val);
initialize_output_signals(&outputs_vblank);
initialize_output_signals(&outputs_vsync);
initialize_output_signals(&outputs_hsync);
+ _SCREEN_WIDTH = 640;
+ _SCREEN_HEIGHT = 200;
+ _CHARS_PER_LINE = 80;
+ _LINES_PER_FRAME = 200;
+ _HD46505_CHAR_CLOCK = 0;
+ _HD46505_HORIZ_FREQ = 0;
set_device_name(_T("HD46505 CRTC"));
}
~HD46505() {}
{
register_output_signal(&outputs_hsync, device, id, mask);
}
-#if defined(HD46505_CHAR_CLOCK)
+//#if defined(HD46505_CHAR_CLOCK)
void set_char_clock(double clock)
{
next_char_clock = clock;
}
-#elif defined(HD46505_HORIZ_FREQ)
+//#elif defined(HD46505_HORIZ_FREQ)
void set_horiz_freq(double freq)
{
next_horiz_freq = freq;
}
-#endif
+//#endif
uint8_t* get_regs()
{
return regs;
cmake_minimum_required (VERSION 2.6)
-message("* vm/babbage2nd")
+message("* vm/jr800")
add_library(vm_jr800
io.cpp
jr800.cpp
-)
\ No newline at end of file
+)
#include "sn76489an.h"
-#ifdef HAS_SN76489
+//#ifdef HAS_SN76489
// SN76489
-#define NOISE_FB 0x4000
-#define NOISE_DST_TAP 1
-#define NOISE_SRC_TAP 2
-#else
+//#define NOISE_FB 0x4000
+//#define NOISE_DST_TAP 1
+//#define NOISE_SRC_TAP 2
+//#else
// SN76489A, SN76496
-#define NOISE_FB 0x10000
-#define NOISE_DST_TAP 4
-#define NOISE_SRC_TAP 8
-#endif
+//#define NOISE_FB 0x10000
+//#define NOISE_DST_TAP 4
+//#define NOISE_SRC_TAP 8
+//#endif
#define NOISE_MODE ((regs[6] & 4) ? 1 : 0)
void SN76489AN::initialize()
{
DEVICE::initialize();
+ if(osd->check_feature(_T("HAS_SN76489"))) {
+ _NOISE_FB = 0x4000;
+ _NOISE_DST_TAP = 1;
+ _NOISE_SRC_TAP = 1;
+ } else {
+ _NOISE_FB = 0x10000;
+ _NOISE_DST_TAP = 4;
+ _NOISE_SRC_TAP = 8;
+ set_device_name(_T("SN76489AN PSG"));
+ }
mute = false;
cs = we = true;
}
regs[i + 0] = 0;
regs[i + 1] = 0x0f; // volume = 0
}
- noise_gen = NOISE_FB;
+ noise_gen = _NOISE_FB;
ch[3].signal = false;
}
data &= 3;
ch[3].period = (data == 3) ? (ch[2].period << 1) : (1 << (data + 5));
// ch[3].count = 0;
- noise_gen = NOISE_FB;
+ noise_gen = _NOISE_FB;
ch[3].signal = false;
break;
}
if(ch[j].count < 0) {
ch[j].count += ch[j].period << 8;
if(j == 3) {
- if(((noise_gen & NOISE_DST_TAP) ? 1 : 0) ^ (((noise_gen & NOISE_SRC_TAP) ? 1 : 0) * NOISE_MODE)) {
+ if(((noise_gen & _NOISE_DST_TAP) ? 1 : 0) ^ (((noise_gen & _NOISE_SRC_TAP) ? 1 : 0) * NOISE_MODE)) {
noise_gen >>= 1;
- noise_gen |= NOISE_FB;
+ noise_gen |= _NOISE_FB;
} else {
noise_gen >>= 1;
}
#ifndef _SN76489AN_H_
#define _SN76489AN_H_
-#include "vm.h"
-#include "../emu.h"
+//#include "vm.h"
+//#include "../emu.h"
#include "device.h"
#define SIG_SN76489AN_MUTE 0
bool mute, cs, we;
uint8_t val;
int volume_l, volume_r;
-
+
+ uint32_t _NOISE_FB;
+ uint32_t _NOISE_DST_TAP;
+ uint32_t _NOISE_SRC_TAP;
public:
SN76489AN(VM* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
{
volume_l = volume_r = 1024;
-#ifdef HAS_SN76489
+//#ifdef HAS_SN76489
set_device_name(_T("SN76489 PSG"));
-#else
- set_device_name(_T("SN76489AN PSG"));
-#endif
+//#else
+ //set_device_name(_T("SN76489AN PSG"));
+//#endif
}
~SN76489AN() {}
void UPD71071::initialize()
{
DEVICE::initialize();
+ _SINGLE_MODE_DMA = osd->check_feature(_T("SINGLE_MODE_DMA"));
+
for(int i = 0; i < 4; i++) {
dma[i].areg = dma[i].bareg = 0;
dma[i].creg = dma[i].bcreg = 0;
dma[selch].mode = data;
break;
case 0x0e:
- if((sreq = data) != 0) {
-#ifndef SINGLE_MODE_DMA
+ if(((sreq = data) != 0) && !(_SINGLE_MODE_DMA)) {
+//#ifndef SINGLE_MODE_DMA
do_dma();
-#endif
+//#endif
}
break;
case 0x0f:
if(data & mask) {
if(!(req & bit)) {
req |= bit;
-#ifndef SINGLE_MODE_DMA
- do_dma();
-#endif
+//#ifndef SINGLE_MODE_DMA
+ if(!_SINGLE_MODE_DMA) do_dma();
+//#endif
}
} else {
req &= ~bit;
// 16bit transfer mode
if((dma[c].mode & 0x0c) == 4) {
// io -> memory
- uint32_t val = dma[c].dev->read_dma_io16(0);
+ uint32_t val;
+ if(dma[c].dev != NULL) {
+ val = dma[c].dev->read_dma_io16(0);
+ } else {
+ val = 0xffff;
+ }
d_mem->write_dma_data16(dma[c].areg, val);
// update temporary register
tmp = val;
} else if((dma[c].mode & 0x0c) == 8) {
// memory -> io
uint32_t val = d_mem->read_dma_data16(dma[c].areg);
- dma[c].dev->write_dma_io16(0, val);
+ if(dma[c].dev != NULL) dma[c].dev->write_dma_io16(0, val);
// update temporary register
tmp = val;
}
// 8bit transfer mode
if((dma[c].mode & 0x0c) == 4) {
// io -> memory
- uint32_t val = dma[c].dev->read_dma_io8(0);
+ uint32_t val;
+ if(dma[c].dev != NULL) {
+ val = dma[c].dev->read_dma_io8(0);
+ } else {
+ val = 0xff;
+ }
d_mem->write_dma_data8(dma[c].areg, val);
// update temporary register
tmp = (tmp >> 8) | (val << 8);
} else if((dma[c].mode & 0x0c) == 8) {
// memory -> io
uint32_t val = d_mem->read_dma_data8(dma[c].areg);
- dma[c].dev->write_dma_io8(0, val);
+ if(dma[c].dev != NULL) {
+ dma[c].dev->write_dma_io8(0, val);
+ }
// update temporary register
tmp = (tmp >> 8) | (val << 8);
}
tc |= bit;
write_signals(&outputs_tc, 0xffffffff);
-#ifdef SINGLE_MODE_DMA
- } else if((dma[c].mode & 0xc0) == 0x40) {
- // single mode
- break;
-#endif
+//#ifdef SINGLE_MODE_DMA
+ } else if(_SINGLE_MODE_DMA) {
+ if((dma[c].mode & 0xc0) == 0x40) {
+ // single mode
+ break;
+ }
+//#endif
}
}
}
}
-#ifdef SINGLE_MODE_DMA
- if(d_dma) {
- d_dma->do_dma();
+//#ifdef SINGLE_MODE_DMA
+ if(_SINGLE_MODE_DMA) {
+ if(d_dma) {
+ d_dma->do_dma();
+ }
}
-#endif
+//#endif
}
#define STATE_VERSION 1
#ifndef _UPD71071_H_
#define _UPD71071_H_
-#include "vm.h"
-#include "../emu.h"
+//#include "vm.h"
+//#include "../emu.h"
#include "device.h"
#define SIG_UPD71071_CH0 0
{
private:
DEVICE* d_mem;
-#ifdef SINGLE_MODE_DMA
+//#ifdef SINGLE_MODE_DMA
DEVICE* d_dma;
-#endif
+//#endif
outputs_t outputs_tc;
struct {
uint8_t b16, selch, base;
uint16_t cmd, tmp;
uint8_t req, sreq, mask, tc;
-
+
+ bool _SINGLE_MODE_DMA;
public:
UPD71071(VM* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
{
for(int i = 0; i < 4; i++) {
- dma[i].dev = vm->dummy;
+ //dma[i].dev = vm->dummy;
+ dma[i].dev = NULL;
}
-#ifdef SINGLE_MODE_DMA
+//#ifdef SINGLE_MODE_DMA
d_dma = NULL;
-#endif
+//#endif
+ _SINGLE_MODE_DMA = false;
initialize_output_signals(&outputs_tc);
set_device_name(_T("uPD71071 DMAC"));
}
{
dma[3].dev = device;
}
-#ifdef SINGLE_MODE_DMA
+//#ifdef SINGLE_MODE_DMA
void set_context_child_dma(DEVICE* device)
{
d_dma = device;
}
-#endif
+//#endif
void set_context_tc(DEVICE* device, int id, uint32_t mask)
{
register_output_signal(&outputs_tc, device, id, mask);
void YM2413::initialize()
{
DEVICE::initialize();
+ //#if defined(_MSX1_VARIANTS) || defined(_MSX2_VARIANTS) || defined(_MSX2P_VARIANTS)
+ __MSX = false;
+ if(osd->check_feature(_T("_MSX1_VARIANTS"))) {
+ __MSX = true;
+ } else if(osd->check_feature(_T("_MSX2_VARIANTS"))) {
+ __MSX = true;
+ } if(osd->check_feature(_T("_MSX2P_VARIANTS"))) {
+ __MSX = true;
+ }
buf[0] = buf[1] = NULL;
mute = false;
}
// vol2 += buf[1][i];
// *buffer++ += vol1<<2; // L
// *buffer++ += vol2<<2; // R
-#if defined(_MSX1_VARIANTS) || defined(_MSX2_VARIANTS) || defined(_MSX2P_VARIANTS)
- *buffer++ += apply_volume((buf[0][i] + buf[1][i]) * 4, volume_l); // L
- *buffer++ += apply_volume((buf[0][i] + buf[1][i]) * 4, volume_r); // R
-#else
- *buffer++ += apply_volume(buf[0][i] * 4, volume_l); // L
- *buffer++ += apply_volume(buf[1][i] * 4, volume_r); // R
-#endif
+//#if defined(_MSX1_VARIANTS) || defined(_MSX2_VARIANTS) || defined(_MSX2P_VARIANTS)
+ if(__MSX) {
+ *buffer++ += apply_volume((buf[0][i] + buf[1][i]) * 4, volume_l); // L
+ *buffer++ += apply_volume((buf[0][i] + buf[1][i]) * 4, volume_r); // R
+ } else {
+//#else
+ *buffer++ += apply_volume(buf[0][i] * 4, volume_l); // L
+ *buffer++ += apply_volume(buf[1][i] * 4, volume_r); // R
+ }
+//#endif
}
}
bool mute;
INT16 *buf[2];
int volume_l, volume_r;
+ bool __MSX;
public:
YM2413(VM* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
{
volume_l = volume_r = 1024;
+ __MSX = false;
set_device_name(_T("YM2413 OPLL"));
}
~YM2413() {}
#define INT_ON_READY (INTERRUPT_CTRL & 0x40)
#define STATUS_AFFECTS_VECTOR (INTERRUPT_CTRL & 0x20)
+void Z80DMA::initialize()
+{
+ DEVICE::initialize();
+ _SINGLE_MODE_DMA = osd->check_feature(_T("SINGLE_MODE_DMA"));
+ _DMA_DEBUG = osd->check_feature(_T("DMA_DEBUG"));
+}
+
void Z80DMA::reset()
{
WR3 &= ~0x20; // disable interrupt
{
if(wr_num == 0) {
if((data & 0x87) == 0) {
-#ifdef DMA_DEBUG
- this->out_debug_log(_T("Z80DMA: WR2=%2x\n"), data);
-#endif
+//#ifdef DMA_DEBUG
+ if(_DMA_DEBUG) this->out_debug_log(_T("Z80DMA: WR2=%2x\n"), data);
+//#endif
WR2 = data;
if(data & 0x40) {
wr_tmp[wr_num++] = GET_REGNUM(PORTB_TIMING);
}
} else if((data & 0x87) == 4) {
-#ifdef DMA_DEBUG
- this->out_debug_log(_T("Z80DMA: WR1=%2x\n"), data);
-#endif
+//#ifdef DMA_DEBUG
+ if(_DMA_DEBUG) this->out_debug_log(_T("Z80DMA: WR1=%2x\n"), data);
+//#endif
WR1 = data;
if(data & 0x40) {
wr_tmp[wr_num++] = GET_REGNUM(PORTA_TIMING);
}
} else if((data & 0x80) == 0) {
-#ifdef DMA_DEBUG
- this->out_debug_log(_T("Z80DMA: WR0=%2x\n"), data);
-#endif
+//#ifdef DMA_DEBUG
+ if(_DMA_DEBUG) this->out_debug_log(_T("Z80DMA: WR0=%2x\n"), data);
+//#endif
WR0 = data;
if(data & 0x08) {
wr_tmp[wr_num++] = GET_REGNUM(PORTA_ADDRESS_L);
wr_tmp[wr_num++] = GET_REGNUM(BLOCKLEN_H);
}
} else if((data & 0x83) == 0x80) {
-#ifdef DMA_DEBUG
- this->out_debug_log(_T("Z80DMA: WR3=%2x\n"), data);
-#endif
+//#ifdef DMA_DEBUG
+ if(_DMA_DEBUG) this->out_debug_log(_T("Z80DMA: WR3=%2x\n"), data);
+//#endif
WR3 = data;
if(data & 0x08) {
wr_tmp[wr_num++] = GET_REGNUM(MASK_BYTE);
}
enabled = ((data & 0x40) != 0);
} else if((data & 0x83) == 0x81) {
-#ifdef DMA_DEBUG
- this->out_debug_log(_T("Z80DMA: WR4=%2x\n"), data);
-#endif
+//#ifdef DMA_DEBUG
+ if(_DMA_DEBUG) this->out_debug_log(_T("Z80DMA: WR4=%2x\n"), data);
+//#endif
WR4 = data;
if(data & 0x04) {
wr_tmp[wr_num++] = GET_REGNUM(PORTB_ADDRESS_L);
wr_tmp[wr_num++] = GET_REGNUM(INTERRUPT_CTRL);
}
} else if((data & 0xc7) == 0x82) {
-#ifdef DMA_DEBUG
- this->out_debug_log(_T("Z80DMA: WR5=%2x\n"), data);
-#endif
+//#ifdef DMA_DEBUG
+ if(_DMA_DEBUG) this->out_debug_log(_T("Z80DMA: WR5=%2x\n"), data);
+//#endif
WR5 = data;
} else if((data & 0x83) == 0x83) {
-#ifdef DMA_DEBUG
- this->out_debug_log(_T("Z80DMA: WR6=%2x\n"), data);
-#endif
+//#ifdef DMA_DEBUG
+ if(_DMA_DEBUG) this->out_debug_log(_T("Z80DMA: WR6=%2x\n"), data);
+//#endif
WR6 = data;
enabled = false;
break;
case CMD_ENABLE_DMA:
enabled = true;
-#ifndef SINGLE_MODE_DMA
- do_dma();
-#endif
+//#ifndef SINGLE_MODE_DMA
+ if(!_SINGLE_MODE_DMA) do_dma();
+//#endif
break;
case CMD_READ_MASK_FOLLOWS:
wr_tmp[wr_num++] = GET_REGNUM(READ_MASK);
upcount = (dma_stop && upcount != blocklen) ? -1 : 0;
enabled = true;
status |= 0x30;
-#ifndef SINGLE_MODE_DMA
- do_dma();
-#endif
+//#ifndef SINGLE_MODE_DMA
+ if(!_SINGLE_MODE_DMA) do_dma();
+//#endif
break;
case CMD_RESET_PORT_A_TIMING:
PORTA_TIMING |= 3;
break;
case CMD_FORCE_READY:
force_ready = true;
-#ifndef SINGLE_MODE_DMA
- do_dma();
-#endif
+//#ifndef SINGLE_MODE_DMA
+ if(!_SINGLE_MODE_DMA) do_dma();
+//#endif
break;
case CMD_ENABLE_INTERRUPTS:
WR3 |= 0x20;
wr_ptr = 0;
} else {
int nreg = wr_tmp[wr_ptr];
-#ifdef DMA_DEBUG
- this->out_debug_log(_T("Z80DMA: WR[%d,%d]=%2x\n"), nreg >> 3, nreg & 7, data);
-#endif
+//#ifdef DMA_DEBUG
+ if(_DMA_DEBUG) this->out_debug_log(_T("Z80DMA: WR[%d,%d]=%2x\n"), nreg >> 3, nreg & 7, data);
+//#endif
regs.t[nreg] = data;
if(++wr_ptr >= wr_num) {
}
uint32_t data = rr_tmp[rr_ptr];
-#ifdef DMA_DEBUG
- this->out_debug_log(_T("Z80DMA: RR[%d]=%2x\n"), rr_ptr, data);
-#endif
+//#ifdef DMA_DEBUG
+ if(_DMA_DEBUG) this->out_debug_log(_T("Z80DMA: RR[%d]=%2x\n"), rr_ptr, data);
+//#endif
if(++rr_ptr >= rr_num) {
rr_ptr = 0;
}
if(INT_ON_READY) {
request_intr(INT_RDY);
}
-#ifndef SINGLE_MODE_DMA
- do_dma();
-#endif
+//#ifndef SINGLE_MODE_DMA
+ if(!_SINGLE_MODE_DMA) do_dma();
+//#endif
}
}
uint32_t data = 0;
int wait_r = 0, wait_w = 0;
-#ifndef SINGLE_MODE_DMA
+//#ifndef SINGLE_MODE_DMA
restart:
-#endif
+//#endif
while(enabled && now_ready() && !(upcount == blocklen || found)) {
if(dma_stop) {
if(upcount < blocklen) {
if(PORTA_IS_SOURCE) {
if(PORTA_MEMORY) {
data = d_mem->read_dma_data8w(addr_a, &wait_r);
-#ifdef DMA_DEBUG
- this->out_debug_log(_T("Z80DMA: RAM[%4x]=%2x -> "), addr_a, data);
-#endif
+//#ifdef DMA_DEBUG
+ if(_DMA_DEBUG) this->out_debug_log(_T("Z80DMA: RAM[%4x]=%2x -> "), addr_a, data);
+//#endif
} else {
data = d_io->read_dma_io8w(addr_a, &wait_r);
-#ifdef DMA_DEBUG
- this->out_debug_log(_T("Z80DMA: INP(%4x)=%2x -> "), addr_a, data);
-#endif
+//#ifdef DMA_DEBUG
+ if(_DMA_DEBUG) this->out_debug_log(_T("Z80DMA: INP(%4x)=%2x -> "), addr_a, data);
+//#endif
}
if(d_cpu != NULL) {
if(CHECK_WAIT_SIGNAL) {
} else {
if(PORTB_MEMORY) {
data = d_mem->read_dma_data8w(addr_b, &wait_r);
-#ifdef DMA_DEBUG
- this->out_debug_log(_T("Z80DMA: RAM[%4x]=%2x -> "), addr_b, data);
-#endif
+//#ifdef DMA_DEBUG
+ if(_DMA_DEBUG) this->out_debug_log(_T("Z80DMA: RAM[%4x]=%2x -> "), addr_b, data);
+//#endif
} else {
data = d_io->read_dma_io8w(addr_b, &wait_r);
-#ifdef DMA_DEBUG
- this->out_debug_log(_T("Z80DMA: INP(%4x)=%2x -> "), addr_b, data);
-#endif
+//#ifdef DMA_DEBUG
+ if(_DMA_DEBUG) this->out_debug_log(_T("Z80DMA: INP(%4x)=%2x -> "), addr_b, data);
+//#endif
}
if(d_cpu != NULL) {
if(CHECK_WAIT_SIGNAL) {
if(TRANSFER_MODE == TM_TRANSFER || TRANSFER_MODE == TM_SEARCH_TRANSFER) {
if(PORTA_IS_SOURCE) {
if(PORTB_MEMORY) {
-#ifdef DMA_DEBUG
- this->out_debug_log(_T("RAM[%4x]\n"), addr_b);
-#endif
+//#ifdef DMA_DEBUG
+ if(_DMA_DEBUG) this->out_debug_log(_T("RAM[%4x]\n"), addr_b);
+//#endif
d_mem->write_dma_data8w(addr_b, data, &wait_w);
} else {
-#ifdef DMA_DEBUG
- this->out_debug_log(_T("OUT(%4x)\n"), addr_b);
-#endif
+//#ifdef DMA_DEBUG
+ if(_DMA_DEBUG) this->out_debug_log(_T("OUT(%4x)\n"), addr_b);
+//#endif
d_io->write_dma_io8w(addr_b, data, &wait_w);
}
if(d_cpu != NULL) {
}
} else {
if(PORTA_MEMORY) {
-#ifdef DMA_DEBUG
- this->out_debug_log(_T("RAM[%4x]\n"), addr_a);
-#endif
+//#ifdef DMA_DEBUG
+ if(_DMA_DEBUG) this->out_debug_log(_T("RAM[%4x]\n"), addr_a);
+//#endif
d_mem->write_dma_data8w(addr_a, data, &wait_w);
} else {
-#ifdef DMA_DEBUG
- this->out_debug_log(_T("OUT(%4x)\n"), addr_a);
-#endif
+//#ifdef DMA_DEBUG
+ if(_DMA_DEBUG) this->out_debug_log(_T("OUT(%4x)\n"), addr_a);
+//#endif
d_io->write_dma_io8w(addr_a, data, &wait_w);
}
if(d_cpu != NULL) {
addr_a += PORTA_FIXED ? 0 : PORTA_INC ? 1 : -1;
}
}
-#ifdef SINGLE_MODE_DMA
- if(OPERATING_MODE == OM_BYTE) {
- break;
+//#ifdef SINGLE_MODE_DMA
+ if(_SINGLE_MODE_DMA) {
+ if(OPERATING_MODE == OM_BYTE) {
+ break;
+ }
}
-#endif
+//#endif
}
-#ifdef DMA_DEBUG
- if(occured) {
- this->out_debug_log(_T("Z80DMA: COUNT=%d BLOCKLEN=%d FOUND=%d\n"), upcount, blocklen, found ? 1 : 0);
+//#ifdef DMA_DEBUG
+ if(_DMA_DEBUG) {
+ if(occured) {
+ this->out_debug_log(_T("Z80DMA: COUNT=%d BLOCKLEN=%d FOUND=%d\n"), upcount, blocklen, found ? 1 : 0);
+ }
}
-#endif
+//#endif
if(occured && (upcount == blocklen || found)) {
// auto restart
if(AUTO_RESTART && upcount == blocklen && !force_ready) {
-#ifdef DMA_DEBUG
- this->out_debug_log(_T("Z80DMA: AUTO RESTART !!!\n"));
-#endif
+//#ifdef DMA_DEBUG
+ if(_DMA_DEBUG) this->out_debug_log(_T("Z80DMA: AUTO RESTART !!!\n"));
+//#endif
upcount = 0;
-#ifndef SINGLE_MODE_DMA
- goto restart;
-#endif
+//#ifndef SINGLE_MODE_DMA
+ if(!_SINGLE_MODE_DMA) goto restart;
+//#endif
}
// update status
{
if(!bus_master) {
if(d_cpu != NULL) {
-#ifdef SINGLE_MODE_DMA
- d_cpu->write_signal(SIG_CPU_BUSREQ, 1, 1);
-#endif
+//#ifdef SINGLE_MODE_DMA
+ if(_SINGLE_MODE_DMA) d_cpu->write_signal(SIG_CPU_BUSREQ, 1, 1);
+//#endif
d_cpu->set_extra_clock(2);
}
bus_master = true;
{
if(bus_master) {
if(d_cpu != NULL) {
-#ifdef SINGLE_MODE_DMA
- d_cpu->write_signal(SIG_CPU_BUSREQ, 0, 0);
-#endif
+//#ifdef SINGLE_MODE_DMA
+ if(_SINGLE_MODE_DMA) d_cpu->write_signal(SIG_CPU_BUSREQ, 0, 0);
+//#endif
if(OPERATING_MODE == OM_BYTE) {
d_cpu->set_extra_clock(1);
} else {
#ifndef _Z80DMA_H_
#define _Z80DMA_H_
-#include "vm.h"
-#include "../emu.h"
+//#include "vm.h"
+//#include "../emu.h"
#include "device.h"
#define SIG_Z80DMA_READY 0
bool req_intr;
bool in_service;
uint8_t vector;
+
+ bool _SINGLE_MODE_DMA;
+ bool _DMA_DEBUG;
bool now_ready();
void request_bus();
for(int i = 0; i < 6 * 8 + 1 + 1; i++) {
regs.t[i] = 0;
}
+ _SINGLE_MODE_DMA = _DMA_DEBUG = false;
d_cpu = d_child = NULL;
set_device_name(_T("Z80 DMA"));
}
// common functions
void reset();
+ void initialize();
void write_io8(uint32_t addr, uint32_t data);
uint32_t read_io8(uint32_t addr);
void write_signal(int id, uint32_t data, uint32_t mask);
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