pinctrl: renesas: r8a779g0: Add missing HSCIF3_A

This patch adds missing HSCIF3_A.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87y1xdsjar.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/pinctrl/renesas/pfc-r8a779g0.c b/drivers/pinctrl/renesas/pfc-r8a779g0.c
index 02e20ed..b7ebf6f 100644 (file)
--- a/drivers/pinctrl/renesas/pfc-r8a779g0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779g0.c
@@ -295,11 +295,11 @@
 
 /* SR1 */
 /* IP0SR1 */           /* 0 */                 /* 1 */                 /* 2 */         /* 3            4        5        6        7        8        9        A        B        C        D        E        F */
-#define IP0SR1_3_0     FM(MSIOF1_SS2)          F_(0, 0)                F_(0, 0)        F_(0, 0)        F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR1_7_4     FM(MSIOF1_SS1)          F_(0, 0)                F_(0, 0)        F_(0, 0)        F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR1_11_8    FM(MSIOF1_SYNC)         F_(0, 0)                F_(0, 0)        F_(0, 0)        F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR1_15_12   FM(MSIOF1_SCK)          F_(0, 0)                F_(0, 0)        F_(0, 0)        F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR1_19_16   FM(MSIOF1_TXD)          F_(0, 0)                F_(0, 0)        F_(0, 0)        F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR1_3_0     FM(MSIOF1_SS2)          FM(HTX3_A)              F_(0, 0)        F_(0, 0)        F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR1_7_4     FM(MSIOF1_SS1)          FM(HCTS3_N_A)           F_(0, 0)        F_(0, 0)        F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR1_11_8    FM(MSIOF1_SYNC)         FM(HRTS3_N_A)           F_(0, 0)        F_(0, 0)        F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR1_15_12   FM(MSIOF1_SCK)          FM(HSCK3_A)             F_(0, 0)        F_(0, 0)        F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR1_19_16   FM(MSIOF1_TXD)          FM(HRX3_A)              F_(0, 0)        F_(0, 0)        F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
 #define IP0SR1_23_20   FM(MSIOF1_RXD)          F_(0, 0)                F_(0, 0)        F_(0, 0)        F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
 #define IP0SR1_27_24   FM(MSIOF0_SS2)          F_(0, 0)                F_(0, 0)        F_(0, 0)        F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
 #define IP0SR1_31_28   FM(MSIOF0_SS1)          F_(0, 0)                F_(0, 0)        F_(0, 0)        F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
@@ -794,10 +794,20 @@ static const u16 pinmux_data[] = {
 
        /* IP0SR1 */
        PINMUX_IPSR_GPSR(IP0SR1_3_0,    MSIOF1_SS2),
+       PINMUX_IPSR_GPSR(IP0SR1_3_0,    HTX3_A),
+
        PINMUX_IPSR_GPSR(IP0SR1_7_4,    MSIOF1_SS1),
+       PINMUX_IPSR_GPSR(IP0SR1_7_4,    HCTS3_N_A),
+
        PINMUX_IPSR_GPSR(IP0SR1_11_8,   MSIOF1_SYNC),
+       PINMUX_IPSR_GPSR(IP0SR1_11_8,   HRTS3_N_A),
+
        PINMUX_IPSR_GPSR(IP0SR1_15_12,  MSIOF1_SCK),
+       PINMUX_IPSR_GPSR(IP0SR1_15_12,  HSCK3_A),
+
        PINMUX_IPSR_GPSR(IP0SR1_19_16,  MSIOF1_TXD),
+       PINMUX_IPSR_GPSR(IP0SR1_19_16,  HRX3_A),
+
        PINMUX_IPSR_GPSR(IP0SR1_23_20,  MSIOF1_RXD),
        PINMUX_IPSR_GPSR(IP0SR1_27_24,  MSIOF0_SS2),
        PINMUX_IPSR_GPSR(IP0SR1_31_28,  MSIOF0_SS1),
@@ -1560,6 +1570,29 @@ static const unsigned int hscif3_ctrl_mux[] = {
        HRTS3_N_MARK, HCTS3_N_MARK,
 };
 
+/* - HSCIF3_A ----------------------------------------------------------------- */
+static const unsigned int hscif3_data_a_pins[] = {
+       /* HRX3_A, HTX3_A */
+       RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 0),
+};
+static const unsigned int hscif3_data_a_mux[] = {
+       HRX3_A_MARK, HTX3_A_MARK,
+};
+static const unsigned int hscif3_clk_a_pins[] = {
+       /* HSCK3_A */
+       RCAR_GP_PIN(1, 3),
+};
+static const unsigned int hscif3_clk_a_mux[] = {
+       HSCK3_A_MARK,
+};
+static const unsigned int hscif3_ctrl_a_pins[] = {
+       /* HRTS3_N_A, HCTS3_N_A */
+       RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 1),
+};
+static const unsigned int hscif3_ctrl_a_mux[] = {
+       HRTS3_N_A_MARK, HCTS3_N_A_MARK,
+};
+
 /* - I2C0 ------------------------------------------------------------------- */
 static const unsigned int i2c0_pins[] = {
        /* SDA0, SCL0 */
@@ -2318,9 +2351,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
        SH_PFC_PIN_GROUP(hscif2_data),
        SH_PFC_PIN_GROUP(hscif2_clk),
        SH_PFC_PIN_GROUP(hscif2_ctrl),
-       SH_PFC_PIN_GROUP(hscif3_data),
-       SH_PFC_PIN_GROUP(hscif3_clk),
-       SH_PFC_PIN_GROUP(hscif3_ctrl),
+       SH_PFC_PIN_GROUP(hscif3_data),          /* suffix might be updated */
+       SH_PFC_PIN_GROUP(hscif3_clk),           /* suffix might be updated */
+       SH_PFC_PIN_GROUP(hscif3_ctrl),          /* suffix might be updated */
+       SH_PFC_PIN_GROUP(hscif3_data_a),        /* suffix might be updated */
+       SH_PFC_PIN_GROUP(hscif3_clk_a),         /* suffix might be updated */
+       SH_PFC_PIN_GROUP(hscif3_ctrl_a),        /* suffix might be updated */
 
        SH_PFC_PIN_GROUP(i2c0),
        SH_PFC_PIN_GROUP(i2c1),
@@ -2520,9 +2556,13 @@ static const char * const hscif2_groups[] = {
 };
 
 static const char * const hscif3_groups[] = {
+       /* suffix might be updated */
        "hscif3_data",
        "hscif3_clk",
        "hscif3_ctrl",
+       "hscif3_data_a",
+       "hscif3_clk_a",
+       "hscif3_ctrl_a",
 };
 
 static const char * const i2c0_groups[] = {