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arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini C.TOUCH 2.0
authorJagan Teki <jagan@amarulasolutions.com>
Thu, 25 Feb 2021 19:24:02 +0000 (00:54 +0530)
committerShawn Guo <shawnguo@kernel.org>
Mon, 15 Mar 2021 04:22:31 +0000 (12:22 +0800)
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier
board.

Genaral features:
- Ethernet 10/100
- Wifi/BT
- USB Type A/OTG
- Audio Out
- CAN
- LVDS panel connector

i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.

i.Core MX8M Mini needs to mount on top of this Carrier board for
creating complete i.Core MX8M Mini C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/Makefile
arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-ctouch2.dts [new file with mode: 0644]

index 6438db3..3b5957f 100644 (file)
@@ -33,6 +33,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2162a-qds.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-ctouch2.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-n801x-s.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-nitrogen-r2.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som-symphony.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-ctouch2.dts b/arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-ctouch2.dts
new file mode 100644 (file)
index 0000000..5389d6f
--- /dev/null
@@ -0,0 +1,97 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 NXP
+ * Copyright (c) 2019 Engicam srl
+ * Copyright (c) 2020 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include "imx8mm.dtsi"
+#include "imx8mm-icore-mx8mm.dtsi"
+
+/ {
+       model = "Engicam i.Core MX8M Mini C.TOUCH 2.0";
+       compatible = "engicam,icore-mx8mm-ctouch2", "engicam,icore-mx8mm",
+                    "fsl,imx8mm";
+
+       chosen {
+               stdout-path = &uart2;
+       };
+};
+
+&fec1 {
+       status = "okay";
+};
+
+&i2c2 {
+       clock-frequency = <400000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c2>;
+       status = "okay";
+};
+
+&i2c4 {
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c4>;
+       status = "okay";
+};
+
+&iomuxc {
+       pinctrl_i2c2: i2c2grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL          0x400001c3
+                       MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA          0x400001c3
+               >;
+       };
+
+       pinctrl_i2c4: i2c4grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL          0x400001c3
+                       MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA          0x400001c3
+               >;
+       };
+
+       pinctrl_uart2: uart2grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX     0x140
+                       MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX     0x140
+               >;
+       };
+
+       pinctrl_usdhc1_gpio: usdhc1gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6       0x41
+               >;
+       };
+
+       pinctrl_usdhc1: usdhc1grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK         0x190
+                       MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD         0x1d0
+                       MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0     0x1d0
+                       MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1     0x1d0
+                       MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2     0x1d0
+                       MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3     0x1d0
+               >;
+       };
+};
+
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart2>;
+       status = "okay";
+};
+
+/* SD */
+&usdhc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
+       cd-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+       max-frequency = <50000000>;
+       bus-width = <4>;
+       no-1-8-v;
+       pm-ignore-notify;
+       keep-power-in-suspend;
+       status = "okay";
+};