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arm64: dts: imx8mq: Add mux controller to iomuxc_gpr
author
Guido Günther
<agx@sigxcpu.org>
Thu, 22 Aug 2019 11:10:23 +0000
(13:10 +0200)
committer
Shawn Guo
<shawnguo@kernel.org>
Sat, 24 Aug 2019 20:47:07 +0000
(22:47 +0200)
The only mux controls the MIPI DSI input selection.
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx8mq.dtsi
patch
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diff --git
a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index
f5d4b12
..
c51d571
100644
(file)
--- a/
arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/
arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@
-440,8
+440,15
@@
};
iomuxc_gpr: syscon@30340000 {
- compatible = "fsl,imx8mq-iomuxc-gpr", "fsl,imx6q-iomuxc-gpr", "syscon";
+ compatible = "fsl,imx8mq-iomuxc-gpr", "fsl,imx6q-iomuxc-gpr",
+ "syscon", "simple-mfd";
reg = <0x30340000 0x10000>;
+
+ mux: mux-controller {
+ compatible = "mmio-mux";
+ #mux-control-cells = <1>;
+ mux-reg-masks = <0x34 0x00000004>; /* MIPI_MUX_SEL */
+ };
};
ocotp: ocotp-ctrl@30350000 {