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radeonsi: initialize TC_L2_dirty to false after buffer allocation
authorMarek Olšák <marek.olsak@amd.com>
Tue, 10 Feb 2015 13:16:56 +0000 (14:16 +0100)
committerMarek Olšák <marek.olsak@amd.com>
Tue, 17 Feb 2015 16:31:48 +0000 (17:31 +0100)
I forgot to do this, though "true" should have no effect on correctness.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
src/gallium/drivers/radeon/r600_buffer_common.c

index b7306d7..ebe8067 100644 (file)
@@ -185,6 +185,7 @@ bool r600_init_resource(struct r600_common_screen *rscreen,
        pb_reference(&old_buf, NULL);
 
        util_range_set_empty(&res->valid_buffer_range);
+       res->TC_L2_dirty = false;
 
        if (rscreen->debug_flags & DBG_VM && res->b.b.target == PIPE_BUFFER) {
                fprintf(stderr, "VM start=0x%"PRIX64"  end=0x%"PRIX64" | Buffer %u bytes\n",