//
//===----------------------------------------------------------------------===//
+#include "InstPrinter/SystemZInstPrinter.h"
#include "MCTargetDesc/SystemZMCTargetDesc.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallVector.h"
return Kind == KindImmTLS;
}
+ const ImmTLSOp getImmTLS() const {
+ assert(Kind == KindImmTLS && "Not a TLS immediate");
+ return ImmTLS;
+ }
+
// Memory operands.
bool isMem() const override {
return Kind == KindMem;
return isMemDisp12(BDLMem, RegKind) && inRange(Mem.Length.Imm, 1, 0x100);
}
+ const MemOp& getMem() const {
+ assert(Kind == KindMem && "Not a Mem operand");
+ return Mem;
+ }
+
// Override MCParsedAsmOperand.
SMLoc getStartLoc() const override { return StartLoc; }
SMLoc getEndLoc() const override { return EndLoc; }
{ MCK_U48Imm, MCK_BDAddr64Disp12, MCK_BDAddr64Disp12, MCK_AnyReg } }
};
+static void printMCExpr(const MCExpr *E, raw_ostream &OS) {
+ if (!E)
+ return;
+ if (auto *CE = dyn_cast<MCConstantExpr>(E))
+ OS << *CE;
+ else if (auto *UE = dyn_cast<MCUnaryExpr>(E))
+ OS << *UE;
+ else if (auto *BE = dyn_cast<MCBinaryExpr>(E))
+ OS << *BE;
+ else if (auto *SRE = dyn_cast<MCSymbolRefExpr>(E))
+ OS << *SRE;
+ else
+ OS << *E;
+}
+
void SystemZOperand::print(raw_ostream &OS) const {
- llvm_unreachable("Not implemented");
+ switch (Kind) {
+ break;
+ case KindToken:
+ OS << "Token:" << getToken();
+ break;
+ case KindReg:
+ OS << "Reg:" << SystemZInstPrinter::getRegisterName(getReg());
+ break;
+ case KindImm:
+ OS << "Imm:";
+ printMCExpr(getImm(), OS);
+ break;
+ case KindImmTLS:
+ OS << "ImmTLS:";
+ printMCExpr(getImmTLS().Imm, OS);
+ if (getImmTLS().Sym) {
+ OS << ", ";
+ printMCExpr(getImmTLS().Sym, OS);
+ }
+ break;
+ case KindMem: {
+ const MemOp &Op = getMem();
+ OS << "Mem:" << *cast<MCConstantExpr>(Op.Disp);
+ if (Op.Base) {
+ OS << "(";
+ if (Op.MemKind == BDLMem)
+ OS << *cast<MCConstantExpr>(Op.Length.Imm) << ",";
+ else if (Op.MemKind == BDRMem)
+ OS << SystemZInstPrinter::getRegisterName(Op.Length.Reg) << ",";
+ if (Op.Index)
+ OS << SystemZInstPrinter::getRegisterName(Op.Index) << ",";
+ OS << SystemZInstPrinter::getRegisterName(Op.Base);
+ OS << ")";
+ }
+ break;
+ }
+ default:
+ case KindInvalid:
+ break;
+ }
}
// Parse one register of the form %<prefix><number>.
--- /dev/null
+// REQUIRES: asserts
+// RUN: llvm-mc -triple s390x-linux-gnu -debug-only=asm-matcher %s 2>&1 | FileCheck %s
+//
+// Check that debug output prints the operands correctly.
+
+// CHECK: AsmMatcher: found 1 encodings with mnemonic 'sllg'
+// CHECK: Trying to match opcode SLLG
+// CHECK: Matching formal operand class MCK_GR64 against actual operand at index 1 (Reg:r3): match success using generic matcher
+// CHECK: Matching formal operand class MCK_GR64 against actual operand at index 2 (Reg:r0): match success using generic matcher
+// CHECK: Matching formal operand class MCK_BDAddr32Disp20 against actual operand at index 3 (Mem:3): match success using generic matcher
+// CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 4: actual operand index out of range Opcode result: complete match, selecting this opcode
+// CHECK: AsmMatcher: found 1 encodings with mnemonic 'llill'
+// CHECK: Trying to match opcode LLILL
+// CHECK: Matching formal operand class MCK_GR64 against actual operand at index 1 (Reg:r0): match success using generic matcher
+// CHECK: Matching formal operand class MCK_U16Imm against actual operand at index 2 (Imm:0): match success using generic matcher
+// CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 3: actual operand index out of range Opcode result: complete match, selecting this opcode
+// CHECK: AsmMatcher: found 1 encodings with mnemonic 'lgr'
+// CHECK: Trying to match opcode LGR
+// CHECK: Matching formal operand class MCK_GR64 against actual operand at index 1 (Reg:r1): match success using generic matcher
+// CHECK: Matching formal operand class MCK_GR64 against actual operand at index 2 (Reg:r0): match success using generic matcher
+// CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 3: actual operand index out of range Opcode result: complete match, selecting this opcode
+// CHECK: AsmMatcher: found 1 encodings with mnemonic 'lg'
+// CHECK: Trying to match opcode LG
+// CHECK: Matching formal operand class MCK_GR64 against actual operand at index 1 (Reg:r1): match success using generic matcher
+// CHECK: Matching formal operand class MCK_BDXAddr64Disp20 against actual operand at index 2 (Mem:16(r2)): match success using generic matcher
+// CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 3: actual operand index out of range Opcode result: complete match, selecting this opcode
+// CHECK: AsmMatcher: found 1 encodings with mnemonic 'lg'
+// CHECK: Trying to match opcode LG
+// CHECK: Matching formal operand class MCK_GR64 against actual operand at index 1 (Reg:r1): match success using generic matcher
+// CHECK: Matching formal operand class MCK_BDXAddr64Disp20 against actual operand at index 2 (Mem:16(r2,r3)): match success using generic matcher
+// CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 3: actual operand index out of range Opcode result: complete match, selecting this opcode
+// CHECK: AsmMatcher: found 1 encodings with mnemonic 'stmg'
+// CHECK: Trying to match opcode STMG
+// CHECK: Matching formal operand class MCK_GR64 against actual operand at index 1 (Reg:r13): match success using generic matcher
+// CHECK: Matching formal operand class MCK_GR64 against actual operand at index 2 (Reg:r15): match success using generic matcher
+// CHECK: Matching formal operand class MCK_BDAddr64Disp20 against actual operand at index 3 (Mem:104(r15)): match success using generic matcher
+// CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 4: actual operand index out of range Opcode result: complete match, selecting this opcode
+// CHECK: AsmMatcher: found 1 encodings with mnemonic 'mvc'
+// CHECK: Trying to match opcode MVC
+// CHECK: Matching formal operand class MCK_BDLAddr64Disp12Len8 against actual operand at index 1 (Mem:184(8,r15)): match success using generic matcher
+// CHECK: Matching formal operand class MCK_BDAddr64Disp12 against actual operand at index 2 (Mem:8(r2)): match success using generic matcher
+// CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 3: actual operand index out of range Opcode result: complete match, selecting this opcode
+// CHECK: AsmMatcher: found 1 encodings with mnemonic 'mvck'
+// CHECK: Trying to match opcode MVCK
+// CHECK: Matching formal operand class MCK_BDRAddr64Disp12 against actual operand at index 1 (Mem:0(r0,r1)): match success using generic matcher
+// CHECK: Matching formal operand class MCK_BDAddr64Disp12 against actual operand at index 2 (Mem:4095(r15)): match success using generic matcher
+// CHECK: Matching formal operand class MCK_GR64 against actual operand at index 3 (Reg:r2): match success using generic matcher
+// CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 4: actual operand index out of range Opcode result: complete match, selecting this opcode
+// CHECK: AsmMatcher: found 1 encodings with mnemonic 'j'
+// CHECK: Trying to match opcode J
+// CHECK: Matching formal operand class MCK_PCRel16 against actual operand at index 1 (Imm:.Ltmp0+2): match success using generic matcher
+// CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 2: actual operand index out of range Opcode result: complete match, selecting this opcode
+// CHECK: AsmMatcher: found 1 encodings with mnemonic 'brasl'
+// CHECK: Trying to match opcode BRASL
+// CHECK: Matching formal operand class MCK_GR64 against actual operand at index 1 (Reg:r14): match success using generic matcher
+// CHECK: Matching formal operand class MCK_PCRelTLS32 against actual operand at index 2 (ImmTLS:fun): match success using generic matcher
+// CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 3: actual operand index out of range Opcode result: complete match, selecting this opcode
+// CHECK: .text
+// CHECK: sllg %r3, %r0, 3
+// CHECK: llill %r0, 0
+// CHECK: lgr %r1, %r0
+// CHECK: lg %r1, 16(%r2)
+// CHECK: lg %r1, 16(%r2,%r3)
+// CHECK: stmg %r13, %r15, 104(%r15)
+// CHECK: mvc 184(8,%r15), 8(%r2)
+// CHECK: mvck 0(%r0,%r1), 4095(%r15), %r2
+// CHECK: .Ltmp0:
+// CHECK: j .Ltmp0+2
+// CHECK: brasl %r14, fun
+
+ sllg %r3, %r0, 3
+ llill %r0, 0
+ lgr %r1, %r0
+ lg %r1, 16(%r2)
+ lg %r1, 16(%r2,%r3)
+ stmg %r13, %r15, 104(%r15)
+ mvc 184(8,%r15), 8(%r2)
+ mvck 0(%r0,%r1), 4095(%r15), %r2
+.Ltmp0:
+ j .Ltmp0+2
+ brasl %r14, fun