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target/arm: enable Secure EL2 in max CPU
author
Rémi Denis-Courmont
<remi.denis.courmont@huawei.com>
Tue, 12 Jan 2021 10:45:10 +0000
(12:45 +0200)
committer
Peter Maydell
<peter.maydell@linaro.org>
Tue, 19 Jan 2021 14:38:52 +0000
(14:38 +0000)
Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20210112104511
.36576-18-remi.denis.courmont@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm/cpu64.c
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diff --git
a/target/arm/cpu64.c
b/target/arm/cpu64.c
index
dbd06cc
..
5e85102
100644
(file)
--- a/
target/arm/cpu64.c
+++ b/
target/arm/cpu64.c
@@
-665,6
+665,7
@@
static void aarch64_max_initfn(Object *obj)
t = FIELD_DP64(t, ID_AA64PFR0, SVE, 1);
t = FIELD_DP64(t, ID_AA64PFR0, FP, 1);
t = FIELD_DP64(t, ID_AA64PFR0, ADVSIMD, 1);
+ t = FIELD_DP64(t, ID_AA64PFR0, SEL2, 1);
cpu->isar.id_aa64pfr0 = t;
t = cpu->isar.id_aa64pfr1;