i965: Fix brw_math1 with scalar argument in gen6 FS.

The docs claim two conflicting things: One, that a scalar source is
supported.  Two, source hstride must be 1 and width must be exec size.
So splat a constant argument out into a full reg to operate on, since
violating the second set of constraints is clearly failing.

The alternative here might be to do a 1-wide exec on a constant
argument for math1.  It would probably save cycles too.  But I'll
leave that for the glsl2-965 branch.

Fixes glsl-algebraic-div-one-2.shader_test.

diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c
index 5c07108..05b440e 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_wm_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c
@@ -852,10 +852,22 @@ void emit_math1(struct brw_wm_compile *c,
                const struct brw_reg *arg0)
 {
    struct brw_compile *p = &c->func;
+   struct intel_context *intel = &p->brw->intel;
    int dst_chan = _mesa_ffs(mask & WRITEMASK_XYZW) - 1;
    GLuint saturate = ((mask & SATURATE) ?
                      BRW_MATH_SATURATE_SATURATE :
                      BRW_MATH_SATURATE_NONE);
+   struct brw_reg src;
+
+   if (intel->gen >= 6 && arg0[0].hstride == BRW_HORIZONTAL_STRIDE_0) {
+      /* Gen6 math requires that source and dst horizontal stride be 1.
+       *
+       */
+      src = *dst;
+      brw_MOV(p, src, arg0[0]);
+   } else {
+      src = arg0[0];
+   }
 
    if (!(mask & WRITEMASK_XYZW))
       return; /* Do not emit dead code */
@@ -871,7 +883,7 @@ void emit_math1(struct brw_wm_compile *c,
            function,
            saturate,
            2,
-           arg0[0],
+           src,
            BRW_MATH_DATA_VECTOR,
            BRW_MATH_PRECISION_FULL);
 
@@ -882,7 +894,7 @@ void emit_math1(struct brw_wm_compile *c,
               function,
               saturate,
               3,
-              sechalf(arg0[0]),
+              sechalf(src),
               BRW_MATH_DATA_VECTOR,
               BRW_MATH_PRECISION_FULL);
    }