msm: kgsl: Add trace ID support for graphics coresight

Add the support for trace ID for coresight. This ID is
will be defined in the respective device tree file.

Change-Id: I78ba05ed05b54fdc0f4d4f55c468f90f39c821f1
Signed-off-by: Lokesh Batra <lbatra@codeaurora.org>
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/gpu/adreno.txt b/Documentation/devicetree/bindings/gpu/adreno.txt
index 8a79626..f5ae85d 100644 (file)
--- a/Documentation/devicetree/bindings/gpu/adreno.txt
+++ b/Documentation/devicetree/bindings/gpu/adreno.txt
@@ -187,7 +187,7 @@ Documentation/devicetree/bindings/coresight/coresight.txt
 - coresight-child-list   List of phandles pointing to the children of this
                          component.
 - coresight-child-ports  List of input port numbers of the children.
-
+- coresight-atid         The unique ATID value of the coresight device
 
 Example of A330 GPU in MSM8916:
 

diff --git a/drivers/gpu/msm/adreno.h b/drivers/gpu/msm/adreno.h
index 1c30b43..2c8345a 100644 (file)
--- a/drivers/gpu/msm/adreno.h
+++ b/drivers/gpu/msm/adreno.h
@@ -676,11 +676,13 @@ ssize_t adreno_coresight_store_register(struct device *dev,
  * @registers - Array of GPU specific registers to configure trace bus output
  * @count - Number of registers in the array
  * @groups - Pointer to an attribute list of control files
+ * @atid - The unique ATID value of the coresight device
  */
 struct adreno_coresight {
        struct adreno_coresight_register *registers;
        unsigned int count;
        const struct attribute_group **groups;
+       unsigned int atid;
 };
 
 

diff --git a/drivers/gpu/msm/adreno_coresight.c b/drivers/gpu/msm/adreno_coresight.c
index 02a3927..901e214 100644 (file)
--- a/drivers/gpu/msm/adreno_coresight.c
+++ b/drivers/gpu/msm/adreno_coresight.c
@@ -200,6 +200,9 @@ static int _adreno_coresight_set(struct adreno_device *adreno_dev)
                kgsl_regwrite(device, coresight->registers[i].offset,
                        coresight->registers[i].value);
 
+       kgsl_property_read_u32(device, "coresight-atid",
+               (unsigned int *)&(coresight->atid));
+
        return 0;
 }
 /**
@@ -281,7 +284,16 @@ void adreno_coresight_start(struct adreno_device *adreno_dev)
                _adreno_coresight_set(adreno_dev);
 }
 
+static int adreno_coresight_trace_id(struct coresight_device *csdev)
+{
+       struct kgsl_device *device = dev_get_drvdata(csdev->dev.parent);
+       struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(ADRENO_DEVICE(device));
+
+       return gpudev->coresight->atid;
+}
+
 static const struct coresight_ops_source adreno_coresight_source_ops = {
+       .trace_id = adreno_coresight_trace_id,
        .enable = adreno_coresight_enable,
        .disable = adreno_coresight_disable,
 };