drm/i915: Fix glk watermark calculations

GLK wants the +1 adjustement for the "blocks per line" value
for x-tile/y-tile, just like cnl+.

Also the x-tile and linear cases are almost identical. The only
difference is this +1 which is always done for glk+, and only
done for linear on skl/bxt. Let's unify it to a single branch
with a special case for the +1, just like we do for y-tile.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200430125822.21985-1-ville.syrjala@linux.intel.com
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 416cb1a..0e53e27 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4868,7 +4868,7 @@ skl_wm_method1(const struct drm_i915_private *dev_priv, u32 pixel_rate,
        wm_intermediate_val = latency * pixel_rate * cpp;
        ret = div_fixed16(wm_intermediate_val, 1000 * dbuf_block_size);
 
-       if (INTEL_GEN(dev_priv) >= 10)
+       if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
                ret = add_fixed16_u32(ret, 1);
 
        return ret;
@@ -5003,18 +5003,19 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
                                           wp->y_min_scanlines,
                                           wp->dbuf_block_size);
 
-               if (INTEL_GEN(dev_priv) >= 10)
+               if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
                        interm_pbpl++;
 
                wp->plane_blocks_per_line = div_fixed16(interm_pbpl,
                                                        wp->y_min_scanlines);
-       } else if (wp->x_tiled && IS_GEN(dev_priv, 9)) {
-               interm_pbpl = DIV_ROUND_UP(wp->plane_bytes_per_line,
-                                          wp->dbuf_block_size);
-               wp->plane_blocks_per_line = u32_to_fixed16(interm_pbpl);
        } else {
                interm_pbpl = DIV_ROUND_UP(wp->plane_bytes_per_line,
-                                          wp->dbuf_block_size) + 1;
+                                          wp->dbuf_block_size);
+
+               if (!wp->x_tiled ||
+                   INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
+                       interm_pbpl++;
+
                wp->plane_blocks_per_line = u32_to_fixed16(interm_pbpl);
        }