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sh: sh7724: Add USBHS DMAEngine support
authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Wed, 15 Jun 2011 06:08:28 +0000 (06:08 +0000)
committerPaul Mundt <lethal@linux-sh.org>
Thu, 16 Jun 2011 06:05:46 +0000 (15:05 +0900)
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
arch/sh/include/cpu-sh4/cpu/sh7724.h
arch/sh/kernel/cpu/sh4a/setup-sh7724.c

index 3daef8e..cbc47e6 100644 (file)
@@ -298,6 +298,14 @@ enum {
        SHDMA_SLAVE_SCIF4_RX,
        SHDMA_SLAVE_SCIF5_TX,
        SHDMA_SLAVE_SCIF5_RX,
+       SHDMA_SLAVE_USB0D0_TX,
+       SHDMA_SLAVE_USB0D0_RX,
+       SHDMA_SLAVE_USB0D1_TX,
+       SHDMA_SLAVE_USB0D1_RX,
+       SHDMA_SLAVE_USB1D0_TX,
+       SHDMA_SLAVE_USB1D0_RX,
+       SHDMA_SLAVE_USB1D1_TX,
+       SHDMA_SLAVE_USB1D1_RX,
        SHDMA_SLAVE_SDHI0_TX,
        SHDMA_SLAVE_SDHI0_RX,
        SHDMA_SLAVE_SDHI1_TX,
index 0333fe9..134a397 100644 (file)
@@ -93,6 +93,46 @@ static const struct sh_dmae_slave_config sh7724_dmae_slaves[] = {
                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0x36,
        }, {
+               .slave_id       = SHDMA_SLAVE_USB0D0_TX,
+               .addr           = 0xA4D80100,
+               .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
+               .mid_rid        = 0x73,
+       }, {
+               .slave_id       = SHDMA_SLAVE_USB0D0_RX,
+               .addr           = 0xA4D80100,
+               .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
+               .mid_rid        = 0x73,
+       }, {
+               .slave_id       = SHDMA_SLAVE_USB0D1_TX,
+               .addr           = 0xA4D80120,
+               .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
+               .mid_rid        = 0x77,
+       }, {
+               .slave_id       = SHDMA_SLAVE_USB0D1_RX,
+               .addr           = 0xA4D80120,
+               .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
+               .mid_rid        = 0x77,
+       }, {
+               .slave_id       = SHDMA_SLAVE_USB1D0_TX,
+               .addr           = 0xA4D90100,
+               .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
+               .mid_rid        = 0xab,
+       }, {
+               .slave_id       = SHDMA_SLAVE_USB1D0_RX,
+               .addr           = 0xA4D90100,
+               .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
+               .mid_rid        = 0xab,
+       }, {
+               .slave_id       = SHDMA_SLAVE_USB1D1_TX,
+               .addr           = 0xA4D90120,
+               .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
+               .mid_rid        = 0xaf,
+       }, {
+               .slave_id       = SHDMA_SLAVE_USB1D1_RX,
+               .addr           = 0xA4D90120,
+               .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
+               .mid_rid        = 0xaf,
+       }, {
                .slave_id       = SHDMA_SLAVE_SDHI0_TX,
                .addr           = 0x04ce0030,
                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),