return rc;
}
+#ifdef CONFIG_MACH_XIAOMI_MSM8998
+ rc = fg_sram_masked_write(chip, 19, 0, 0x08, 0x08, FG_IMA_DEFAULT);
+ if (rc < 0) {
+ pr_err("Error in writing cc soc auto clear rc=%d\n", rc);
+ }
+#endif
+
fg_encode(chip->sp, FG_SRAM_ESR_PULSE_THRESH,
chip->dt.esr_pulse_thresh_ma, buf);
rc = fg_sram_write(chip, chip->sp[FG_SRAM_ESR_PULSE_THRESH].addr_word,
.name = "fast charge current",
.reg = FAST_CHARGE_CURRENT_CFG_REG,
.min_u = 0,
+#ifdef CONFIG_MACH_XIAOMI_MSM8998
+ .max_u = 3300000,
+#else
.max_u = 4500000,
+#endif
.step_u = 25000,
},
.fv = {
.name = "float voltage",
.reg = FLOAT_VOLTAGE_CFG_REG,
.min_u = 3487500,
+#ifdef CONFIG_MACH_XIAOMI_MSM8998
+ .max_u = 4400000,
+#else
.max_u = 4920000,
+#endif
.step_u = 7500,
},
.usb_icl = {
.name = "usb input current limit",
.reg = USBIN_CURRENT_LIMIT_CFG_REG,
.min_u = 0,
+#ifdef CONFIG_MACH_XIAOMI_MSM8998
+ .max_u = 3000000,
+#else
.max_u = 4800000,
+#endif
.step_u = 25000,
},
.icl_stat = {
.name = "usb otg current limit",
.reg = OTG_CURRENT_LIMIT_CFG_REG,
.min_u = 250000,
+#ifdef CONFIG_MACH_XIAOMI_MSM8998
+ .max_u = 1500000,
+#else
.max_u = 2000000,
+#endif
.step_u = 250000,
},
.dc_icl = {
.name = "jeita fcc reduction",
.reg = JEITA_CCCOMP_CFG_REG,
.min_u = 0,
+#ifdef CONFIG_MACH_XIAOMI_MSM8998
+ .max_u = 3000000,
+#else
.max_u = 1575000,
+#endif
.step_u = 25000,
},
.freq_buck = {
#define MICRO_1P5A 1500000
#define MICRO_P1A 100000
+#ifdef CONFIG_MACH_XIAOMI_MSM8998
+#define MAX_DCP_ICL_UA 1800000
+#endif
#define OTG_DEFAULT_DEGLITCH_TIME_MS 50
#define MIN_WD_BARK_TIME 16
#define DEFAULT_WD_BARK_TIME 64
if (rc < 0)
chip->dt.usb_icl_ua = -EINVAL;
+#ifdef CONFIG_MACH_XIAOMI_MSM8998
+ chg->dcp_icl_ua = MAX_DCP_ICL_UA;
+#endif
+
rc = of_property_read_u32(node,
"qcom,otg-cl-ua", &chg->otg_cl_ua);
if (rc < 0)
chg->micro_usb_mode = of_property_read_bool(node, "qcom,micro-usb");
+#ifndef CONFIG_MACH_XIAOMI_MSM8998
chg->dcp_icl_ua = chip->dt.usb_icl_ua;
+#endif
chg->suspend_input_on_debug_batt = of_property_read_bool(node,
"qcom,suspend-input-on-debug-batt");
BATT_PROFILE_VOTER);
break;
case POWER_SUPPLY_PROP_TECHNOLOGY:
- val->intval = POWER_SUPPLY_TECHNOLOGY_LION;
+ val->intval = POWER_SUPPLY_TECHNOLOGY_LIPO;
break;
case POWER_SUPPLY_PROP_CHARGE_DONE:
rc = smblib_get_prop_batt_charge_done(chg, val);
return rc;
}
+#ifdef CONFIG_MACH_XIAOMI_MSM8998
+ /* enable try.SINK mode */
+ rc = smblib_masked_write(chg, TYPE_C_CFG_3_REG, EN_TRYSINK_MODE_BIT,
+ EN_TRYSINK_MODE_BIT);
+ if (rc < 0) {
+ dev_err(chg->dev, "Couldn't set Type-C config rc=%d\n", rc);
+ return rc;
+ }
+
+ /* disable legacy cable IRQs */
+ rc = smblib_masked_write(chg, TYPE_C_CFG_3_REG,
+ TYPEC_NONCOMPLIANT_LEGACY_CABLE_INT_EN_BIT |
+ TYPEC_LEGACY_CABLE_INT_EN_BIT, 0);
+ if (rc < 0) {
+ dev_err(chg->dev, "Couldn't set Type-C config rc=%d\n", rc);
+ return rc;
+ }
+#else
/* disable try.SINK mode and legacy cable IRQs */
rc = smblib_masked_write(chg, TYPE_C_CFG_3_REG, EN_TRYSINK_MODE_BIT |
TYPEC_NONCOMPLIANT_LEGACY_CABLE_INT_EN_BIT |
dev_err(chg->dev, "Couldn't set Type-C config rc=%d\n", rc);
return rc;
}
-
+#endif
return rc;
}
vote(chg->hvdcp_enable_votable, MICRO_USB_VOTER,
chg->micro_usb_mode, 0);
+#ifdef CONFIG_MACH_XIAOMI_MSM8998
+ /* Operate the QC2.0 in 5V/9V mode i.e. Disable 12V */
+ rc = smblib_masked_write(chg, HVDCP_PULSE_COUNT_MAX_REG,
+ PULSE_COUNT_QC2P0_12V | PULSE_COUNT_QC2P0_9V,
+ PULSE_COUNT_QC2P0_9V);
+ if (rc < 0) {
+ dev_err(chg->dev,
+ "Couldn't configure QC2.0 to 9V rc=%d\n", rc);
+ return rc;
+ }
+ /* Operate the QC3.0 to limit vbus to 6.6v*/
+ rc = smblib_masked_write(chg, HVDCP_PULSE_COUNT_MAX_REG,
+ PULSE_COUNT_QC3P0_mask,
+ 0x8);
+ if (rc < 0) {
+ dev_err(chg->dev,
+ "Couldn't configure QC3.0 to 6.6V rc=%d\n", rc);
+ return rc;
+ }
+#endif
+
/*
* AICL configuration:
* start from min and AICL ADC disable
/* set driver data before resources request it */
platform_set_drvdata(pdev, chip);
+#ifdef CONFIG_MACH_XIAOMI_MSM8998
+ /* wakeup init should be done at the beginning of smb2_probe */
+ device_init_wakeup(chg->dev, true);
+#endif
+
rc = smb2_init_vbus_regulator(chip);
if (rc < 0) {
pr_err("Couldn't initialize vbus regulator rc=%d\n",
}
batt_charge_type = val.intval;
+#ifndef CONFIG_MACH_XIAOMI_MSM8998
device_init_wakeup(chg->dev, true);
+#endif
pr_info("QPNP SMB2 probed successfully usb:present=%d type=%d batt:present = %d health = %d charge = %d\n",
usb_present, chg->real_charger_type,
int rc = 0;
bool override;
+#ifdef CONFIG_MACH_XIAOMI_MSM8998
+ union power_supply_propval val = {0, };
+ int usb_present = 0;
+#endif
+
/* suspend and return if 25mA or less is requested */
if (icl_ua < USBIN_25MA)
return smblib_set_usb_suspend(chg, true);
+#ifdef CONFIG_MACH_XIAOMI_MSM8998
+ disable_irq_nosync(chg->irq_info[USBIN_ICL_CHANGE_IRQ].irq);
+#endif
+
if (icl_ua == INT_MAX)
goto override_suspend_config;
goto enable_icl_changed_interrupt;
}
} else {
+#ifdef CONFIG_MACH_XIAOMI_MSM8998
+ rc = smblib_get_prop_usb_present(chg, &val);
+ if (rc < 0)
+ smblib_err(chg, "Couldn't get usb present rc = %d\n", rc);
+ else
+ usb_present = val.intval;
+
+ if (usb_present
+ && chg->typec_mode == POWER_SUPPLY_TYPEC_NONE)
+ set_sdp_current(chg, 500000);
+ else
+ set_sdp_current(chg, 100000);
+#else
set_sdp_current(chg, 100000);
+#endif
rc = smblib_set_charge_param(chg, &chg->param.usb_icl, icl_ua);
if (rc < 0) {
smblib_err(chg, "Couldn't set HC ICL rc=%d\n", rc);
}
enable_icl_changed_interrupt:
+
+#ifdef CONFIG_MACH_XIAOMI_MSM8998
+ enable_irq(chg->irq_info[USBIN_ICL_CHANGE_IRQ].irq);
+#endif
+
return rc;
}
#define SDP_CURRENT_UA 500000
#define CDP_CURRENT_UA 1500000
+#ifdef CONFIG_MACH_XIAOMI_MSM8998
+#define DCP_CURRENT_UA 1800000
+#define HVDCP_CURRENT_UA 1500000
+#define HVDCP3_CURRENT_UA 3000000
+#else
#define DCP_CURRENT_UA 1500000
#define HVDCP_CURRENT_UA 3000000
+#endif
#define TYPEC_DEFAULT_CURRENT_UA 900000
#define TYPEC_MEDIUM_CURRENT_UA 1500000
#define TYPEC_HIGH_CURRENT_UA 3000000
typec_source_rd = smblib_get_prop_ufp_mode(chg);
+#ifdef CONFIG_MACH_XIAOMI_MSM8998
+ /* QC 2.0 adapter*/
+ if (apsd_result->bit & QC_2P0_BIT) {
+ *total_current_ua = HVDCP_CURRENT_UA;
+ return 0;
+ }
+
+ /* QC 3.0 adapter */
+ if (apsd_result->bit & QC_3P0_BIT) {
+ *total_current_ua = HVDCP3_CURRENT_UA;
+ return 0;
+ }
+#else
/* QC 2.0/3.0 adapter */
if (apsd_result->bit & (QC_3P0_BIT | QC_2P0_BIT)) {
*total_current_ua = HVDCP_CURRENT_UA;
return 0;
}
+#endif
if (non_compliant) {
switch (apsd_result->bit) {
bool rising)
{
const struct apsd_result *apsd_result;
+#ifdef CONFIG_MACH_XIAOMI_MSM8998
+ int current_ua;
+#endif
int rc;
if (!rising)
smblib_dbg(chg, PR_INTERRUPT, "IRQ: hvdcp-3p0-auth-done rising; %s detected\n",
apsd_result->name);
+
+#ifdef CONFIG_MACH_XIAOMI_MSM8998
+ if (apsd_result->bit & QC_2P0_BIT) {
+ current_ua = HVDCP_CURRENT_UA;
+ } else if (apsd_result->bit & QC_3P0_BIT) {
+ current_ua = HVDCP3_CURRENT_UA;
+ }
+
+ vote(chg->usb_icl_votable, LEGACY_UNKNOWN_VOTER, true,
+ current_ua);
+#endif
}
static void smblib_handle_hvdcp_check_timeout(struct smb_charger *chg,
static void smblib_force_legacy_icl(struct smb_charger *chg, int pst)
{
+#ifndef CONFIG_MACH_XIAOMI_MSM8998
int typec_mode;
int rp_ua;
+#endif
/* while PD is active it should have complete ICL control */
if (chg->pd_active)
*/
if (!is_client_vote_enabled(chg->usb_icl_votable,
USB_PSY_VOTER))
+#ifdef CONFIG_MACH_XIAOMI_MSM8998
+ vote(chg->usb_icl_votable, USB_PSY_VOTER, true, 500000);
+#else
+
vote(chg->usb_icl_votable, USB_PSY_VOTER, true, 100000);
+#endif
vote(chg->usb_icl_votable, LEGACY_UNKNOWN_VOTER, false, 0);
break;
case POWER_SUPPLY_TYPE_USB_CDP:
vote(chg->usb_icl_votable, LEGACY_UNKNOWN_VOTER, true, 1500000);
break;
case POWER_SUPPLY_TYPE_USB_DCP:
+#ifndef CONFIG_MACH_XIAOMI_MSM8998
typec_mode = smblib_get_prop_typec_mode(chg);
rp_ua = get_rp_based_dcp_current(chg, typec_mode);
vote(chg->usb_icl_votable, LEGACY_UNKNOWN_VOTER, true, rp_ua);
break;
+#endif
case POWER_SUPPLY_TYPE_USB_FLOAT:
+#ifdef CONFIG_MACH_XIAOMI_MSM8998
+ vote(chg->usb_icl_votable, LEGACY_UNKNOWN_VOTER, true, 1800000);
+#else
/*
* limit ICL to 100mA, the USB driver will enumerate to check
* if this is a SDP and appropriately set the current
*/
vote(chg->usb_icl_votable, LEGACY_UNKNOWN_VOTER, true, 100000);
+#endif
break;
case POWER_SUPPLY_TYPE_USB_HVDCP:
+#ifdef CONFIG_MACH_XIAOMI_MSM8998
+ vote(chg->usb_icl_votable, LEGACY_UNKNOWN_VOTER, true, 100000);
+ break;
+#endif
case POWER_SUPPLY_TYPE_USB_HVDCP_3:
vote(chg->usb_icl_votable, LEGACY_UNKNOWN_VOTER, true, 3000000);
break;
smblib_err(chg, "Couldn't enable type-c rc=%d\n", rc);
/* wait for type-c detection to complete */
+#ifdef CONFIG_MACH_XIAOMI_MSM8998
+ msleep(1000);
+#else
msleep(400);
+#endif
rc = smblib_read(chg, TYPE_C_STATUS_5_REG, &stat);
if (rc < 0) {
#define SUBTYPE_MASK GENMASK(7, 0)
#define INT_RT_STS_OFFSET 0x10
+#ifdef CONFIG_MACH_XIAOMI_MSM8998
+#define HVDCP_PULSE_COUNT_MAX_REG (USBIN_BASE + 0x5B)
+#define PULSE_COUNT_QC2P0_12V BIT(7)
+#define PULSE_COUNT_QC2P0_9V BIT(6)
+#define PULSE_COUNT_QC3P0_mask GENMASK(5, 0)
+#endif
+
/* CHGR Peripheral Registers */
#define BATTERY_CHARGER_STATUS_1_REG (CHGR_BASE + 0x06)
#define BVR_INITIAL_RAMP_BIT BIT(7)