drm/amdgpu: disable sienna chichlid UMC RAS

disable UMC RAS in lieu of stability issues on certain sku

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 40614ac..7f79d25 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -2008,8 +2008,7 @@ static int amdgpu_ras_check_asic_type(struct amdgpu_device *adev)
 {
        if (adev->asic_type != CHIP_VEGA10 &&
                adev->asic_type != CHIP_VEGA20 &&
-               adev->asic_type != CHIP_ARCTURUS &&
-               adev->asic_type != CHIP_SIENNA_CICHLID)
+               adev->asic_type != CHIP_ARCTURUS)
                return 1;
        else
                return 0;
@@ -2053,6 +2052,7 @@ static void amdgpu_ras_check_supported(struct amdgpu_device *adev,
 
        *supported = amdgpu_ras_enable == 0 ?
                        0 : *hw_supported & amdgpu_ras_mask;
+
        adev->ras_features = *supported;
 }