[ARM64-BE] Fix fast-isel, and add appropriate RUN lines to appropriate tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208200 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM64/ARM64FastISel.cpp b/lib/Target/ARM64/ARM64FastISel.cpp
index 1af5073..78cde1c 100644 (file)
--- a/lib/Target/ARM64/ARM64FastISel.cpp
+++ b/lib/Target/ARM64/ARM64FastISel.cpp
@@ -1593,6 +1593,11 @@ bool ARM64FastISel::SelectRet(const Instruction *I) {
     EVT RVEVT = TLI.getValueType(RV->getType());
     if (!RVEVT.isSimple())
       return false;
+
+    // Vectors (of > 1 lane) in big endian need tricky handling.
+    if (RVEVT.isVector() && RVEVT.getVectorNumElements() > 1)
+      return false;
+
     MVT RVVT = RVEVT.getSimpleVT();
     if (RVVT == MVT::f128)
       return false;

diff --git a/test/CodeGen/ARM64/big-endian-bitconverts.ll b/test/CodeGen/ARM64/big-endian-bitconverts.ll
index 51ea426..cb8708b 100644 (file)
--- a/test/CodeGen/ARM64/big-endian-bitconverts.ll
+++ b/test/CodeGen/ARM64/big-endian-bitconverts.ll
@@ -1,4 +1,5 @@
-; RUN: llc -mtriple arm64_be < %s -arm64-load-store-opt=false -o - | FileCheck %s
+; RUN: llc -mtriple arm64_be < %s -arm64-load-store-opt=false -O1 -o - | FileCheck %s
+; RUN: llc -mtriple arm64_be < %s -arm64-load-store-opt=false -O0 -fast-isel=true -o - | FileCheck %s
 
 ; CHECK-LABEL: test_i64_f64:
 define void @test_i64_f64(double* %p, i64* %q) {

diff --git a/test/CodeGen/ARM64/big-endian-vector-callee.ll b/test/CodeGen/ARM64/big-endian-vector-callee.ll
index 9416f07..5b9ccac 100644 (file)
--- a/test/CodeGen/ARM64/big-endian-vector-callee.ll
+++ b/test/CodeGen/ARM64/big-endian-vector-callee.ll
@@ -1,4 +1,5 @@
 ; RUN: llc -mtriple arm64_be < %s -arm64-load-store-opt=false -o - | FileCheck %s
+; RUN: llc -mtriple arm64_be < %s -fast-isel=true -arm64-load-store-opt=false -o - | FileCheck %s
 
 ; CHECK-LABEL: test_i64_f64:
 define i64 @test_i64_f64(double %p) {

diff --git a/test/CodeGen/ARM64/big-endian-vector-caller.ll b/test/CodeGen/ARM64/big-endian-vector-caller.ll
index 917e64a..194a321 100644 (file)
--- a/test/CodeGen/ARM64/big-endian-vector-caller.ll
+++ b/test/CodeGen/ARM64/big-endian-vector-caller.ll
@@ -1,4 +1,5 @@
 ; RUN: llc -mtriple arm64_be < %s -arm64-load-store-opt=false -o - | FileCheck %s
+; RUN: llc -mtriple arm64_be < %s -arm64-load-store-opt=false -fast-isel=true -O0 -o - | FileCheck %s
 
 ; CHECK-LABEL: test_i64_f64:
 declare i64 @test_i64_f64_helper(double %p)